The following document contains information on Cypress products. The document has the series
name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will
offer these products to new and existing customers with the series name, product name, and
ordering part number with the prefix “CY”.
How to Check the Ordering Part Number
1. Go to
www.cypress.com/pcn.
2. Enter the keyword (for example, ordering part number) in the
SEARCH PCNS
field and click
Apply.
3. Click the corresponding title from the search results.
4. Download the Affected Parts List file, which has details of all changes
For More Information
Please contact your local sales office for additional information about Cypress products and
solutions.
About Cypress
Cypress is the leader in advanced embedded system solutions for the world's most innovative
automotive, industrial, smart home appliances, consumer electronics and medical products.
Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable,
high-performance memories help engineers design differentiated products and get them to market
first. Cypress is committed to providing customers with the best support and development
resources on the planet enabling them to disrupt markets by creating new product categories in
record time. To learn more, go to
www.cypress.com.
MB9AB40NB Series
32-bit ARM
®
Cortex
®
-M3
FM3 Microcontroller
The MB9AB40NB Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with
low-power consumption mode and competitive cost.
These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and have
peripheral functions such as various timers, ADCs, LCDC and Communication Interfaces (USB, UART, CSIO, I
2
C).
The products which are described in this data sheet are placed into TYPE6 product categories in FM3 Family
Peripheral Manual.
Features
32-bit ARM Cortex-M3 Core
Processor version: r2p1
Up to 40 MHz Frequency Operation
Integrated Nested Vectored Interrupt Controller (NVIC): 1
USB Interface
The USB interface is composed of Device and Host. PLL for
USB is built-in, USB clock can be generated by multiplication
of Main clock.
[USB device]
USB2.0 Full-Speed supported
Max 6 EndPoint supported
NMI (non-maskable interrupt) and
48 peripheral interrupts and 16 priority levels
24-bit System timer (Sys Tick): System timer for OS task
management
On-chip Memories
[Flash memory]
Dual operation Flash memory
Dual Operation Flash memory has the upper bank and
the lower bank. So, this series could implement erase,
write and read operations for each bank
simultaneously.
Main area: Up to 256 Kbytes (Up to 240 Kbytes upper
bank + 16 Kbytes lower bank)
Work area: 32 Kbytes (lower bank)
•
•
EndPoint 0 is control transfer
EndPoint 1, 2 can select Bulk-transfer,
Interrupt-transfer or Isochronous-transfer
EndPoint 3 to 5 can select Bulk-transfer or
Interrupt-transfer
EndPoint 1 to 5 is comprised of Double Buffers.
The size of each endpoint is according to the follows.
Endpoint 0, 2 to 5: 64 bytes
Endpoint 1: 256 bytes
[USB host]
USB2.0 Full/Low-speed supported
Bulk-transfer, interrupt-transfer and Isochronous-transfer
Read cycle: 0 wait-cycle
Security function for code protection
support
USB Device connected/disconnected automatic detection
Automatic processing of the IN/OUT token handshake
[SRAM]
This Series on-chip SRAM is composed of two independent
SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus
and D-code bus of Cortex-M3 core. SRAM1 is connected to
System bus.
SRAM0: Up to 16 Kbytes
SRAM1: Up to 16 Kbytes
packet
Max 256-byte packet-length supported
Wake-up function supported
LCD Controller (LCDC)
Up to 40 SEG × 8 COM
8 COM or 4 COM mode can be selected.
Built-in internal dividing resistor
LCD drive power supply (bias) pin (VV4 to VV0)
With blinking function
External Bus Interface*
Supports SRAM, NOR Flash memory device
Up to 8 chip selects
8-/16-bit Data width
Up to 25-bit Address bit
Maximum area size : Up to 256 Mbytes
Supports Address/Data multiplex
Supports external RDY function
*: MB9AFB41LB, FB42LB and FB44LB do not support
External Bus Interface.
Cypress Semiconductor Corporation
Document Number: 002-05631 Rev *B
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised July 26, 2017
MB9AB40NB Series
Multi-function Serial Interface (Max 8channels)
4 channels with 16steps×9-bit FIFO (ch.4 to ch.7), 4
Base Timer (Max 8 channels)
Operation mode is selectable from the following for each
channel.
16-bit PWM timer
16-bit PPG timer
16-/32-bit reload timer
16-/32-bit PWC timer
channels without FIFO (ch.0 to ch.3)
Operation mode is selectable from the following for each
channel.
UART
CSIO
I
2
C
[UART]
Full-duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Hardware Flow control* : Automatically control the
General-Purpose I/O Port
This series can use its pins as general-purpose I/O ports when
they are not used for external bus or peripherals. Moreover,
the port relocate function is built in. It can set which I/O port
the peripheral function can be allocated to.
Capable of pull-up control per pin
Capable of reading pin level directly
Built-in the port relocate function
Up to 83 fast general-purpose I/O Ports@100 pin Package
Some ports are 5 V tolerant.
transmission by CTS/RTS (only ch.4)
Various error detection functions available (parity errors,
framing errors, and overrun errors)
*: MB9AFB41LB, FB42LB and FB44LB do not support
Hardware Flow control.
[CSIO]
Full-duplex double buffer
Built-in dedicated baud rate generator
Overrun error detection function available
See
Pin Assignment
to confirm the corresponding pins.
Dual Timer (32-/16-bit Down Counter)
The Dual Timer consists of two programmable 32-/16-bit down
counters.
Operation mode is selectable from the following for each
channel.
Free-running
Periodic (=Reload)
One-shot
[I
2
C]
Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps)
supported
DMA Controller (8 channels)
The DMA Controller has an independent bus from the CPU, so
CPU and DMA Controller can process simultaneously.
8 independently configured and operated channels
Transfer can be started by software or request from the
HDMI-CEC/Remote Control Receiver (Up to 2
channels)
[HDMI-CEC transmitter]
Header block automatic transmission by judging Signal free
Generating status interrupt by detecting Arbitration lost
Generating START, EOM, ACK automatically to output CEC
built-in peripherals
Transfer address area: 32-bit (4 Gbytes)
Transfer mode: Block transfer/Burst transfer/Demand
transmission by setting 1 byte data
Generating transmission status interrupt when transmitting
transfer
Transfer data type: byte/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
1 block (1 byte data and EOM/ACK)
[HDMI-CEC receiver]
Automatic ACK reply function available
Line error detection function available
A/D Converter (Max 24 channels)
[12-bit A/D Converter]
Successive Approximation type
Built-in 2 units
Conversion time: 2.0 μs @ 2.7 V to 3.6 V
Priority conversion available (priority at 2 levels)
Scanning conversion mode
Built-in FIFO for conversion data storage (for SCAN
[Remote control receiver]
4 bytes reception buffer
Repeat code detection function available
conversion: 16 steps, for Priority conversion: 4 steps)
Document Number: 002-05631 Rev *B
Page 2 of 128
MB9AB40NB Series
Real-time clock (RTC)
The Real-time clock can count
year/Month/Day/Hour/Minute/Second/A day of the week from
00 to 99.
The interrupt function with specifying date and time
[Resets]
Reset requests from INITX pin
Power on reset
Software reset
Watchdog timers reset
Low-voltage detection reset
Clock Super Visor reset
(Year/Month/Day/Hour/Minute) is available. This function is
also available by specifying only Year, Month, Day, Hour or
Minute.
Timer interrupt function after set time or each set time.
Capable of rewriting the time with continuing the time count.
Leap year automatic count is available.
Clock Super Visor (CSV)
Clocks generated by built-in CR oscillators are used to
supervise abnormality of the external clocks.
External clock failure (clock stop) is detected, reset is
Watch Counter
The Watch counter is used for wake up from sleep and
asserted.
External frequency anomaly is detected, interrupt or reset is
timer mode.
Interval timer: up to 64 s (Max) @ Sub Clock: 32.768 kHz
asserted.
External Interrupt Controller Unit
Up to 16 external interrupt input pins
Include one non-maskable interrupt (NMI) input pin
Low-Voltage Consumption Detector (LVD)
This Series includes 2-stage monitoring of voltage on the
Watchdog Timer (2 channels)
A watchdog timer can generate interrupts or a reset when a
VCC pins. When the voltage falls below the voltage that has
been set, Low-Voltage Detector generates an interrupt or
reset.
LVD1: error reporting via interrupt
LVD2: auto-reset operation
time-out value is reached.
This series consists of two different watchdogs, a Hardware
watchdog and a Software watchdog.
The Hardware watchdog timer is clocked by the built-in
Low-Power Consumption Mode
Six low-power consumption modes supported.
low-speed CR oscillator. Therefore, the Hardware watchdog
is active in any low-power consumption modes except RTC,
Stop, Deep Standby RTC, Deep Standby Stop modes.
CRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator calculates the CRC which has a heavy
software processing load, and achieves a reduction of the
integrity check processing load for reception data and storage.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
CCITT CRC16 Generator Polynomial: 0x1021
IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
Sleep
Timer
RTC
Stop
Deep Standby RTC (selectable between keeping the
value of RAM and not)
Deep Standby Stop (selectable between keeping the
value of RAM and not)
Debug
Serial Wire JTAG Debug Port (SWJ-DP)
Embedded Trace Macrocells (ETM).*
Clock and Reset
[Clocks]
Selectable from five clock sources (2 external oscillators, 2
*: MB9AFB41LB/MB, FB42LB/MB, FB44LB/MB support only
SWJ-DP.
Unique ID
Unique value of the device (41-bit) is set.
built-in CR oscillators, and Main PLL).
Main Clock: 4 MHz to 48 MHz
Sub Clock: 32.768 kHz
Built-in high-speed CR Clock: 4 MHz
Built-in low-speed CR Clock: 100 kHz
Main PLL Clock
Power Supply
Wide range voltage:
VCC = 1.65 V to 3.6 V
VCC = 3.0 V to 3.6 V (when USB is used)
VCC = 2.2 V to 3.6 V (when LCDC is used)
Document Number: 002-05631 Rev *B
Page 3 of 128
MB9AB40NB Series
Contents
Features.......................................................................................................................................................................... 1
1.
Product Lineup ...................................................................................................................................................... 6
2.
Packages................................................................................................................................................................ 7
3.
Pin Assignment ..................................................................................................................................................... 8
4.
List of Pin Functions ........................................................................................................................................... 15
4.1
List of Pin Numbers ............................................................................................................................................ 15
4.2
List of Pin Functions ........................................................................................................................................... 26
5.
I/O Circuit Type .................................................................................................................................................... 41
6.
Handling Precautions ......................................................................................................................................... 48
6.1
Precautions for Product Design .......................................................................................................................... 48
6.2
Precautions for Package Mounting ..................................................................................................................... 49
6.3
Precautions for Use Environment ....................................................................................................................... 51
7.
Handling Devices ................................................................................................................................................ 52
8.
Block Diagram ..................................................................................................................................................... 54
9.
Memory Size ........................................................................................................................................................ 54
10. Memory Map ........................................................................................................................................................ 55
11. Pin Status in Each CPU State ............................................................................................................................. 58
12. List of Pin Status ................................................................................................................................................. 59
13. Electrical Characteristics ................................................................................................................................... 66
13.1 Absolute Maximum Ratings ................................................................................................................................ 66
13.2 Recommended Operating Conditions................................................................................................................. 67
13.3 DC Characteristics.............................................................................................................................................. 68
13.3.1 Current rating ...................................................................................................................................................... 68
13.3.2 Pin Characteristics .............................................................................................................................................. 71
13.4 LCD Characteristics............................................................................................................................................ 72
13.5 AC Characteristics .............................................................................................................................................. 73
13.5.1 Main Clock Input Characteristics ......................................................................................................................... 73
13.5.2 Sub Clock Input Characteristics .......................................................................................................................... 74
13.5.3 Built-in CR Oscillation Characteristics ................................................................................................................. 74
13.5.4 Operating Conditions of Main and USB PLL ....................................................................................................... 75
13.5.5 Reset Input Characteristics ................................................................................................................................. 76
13.5.6 Power-on Reset Timing....................................................................................................................................... 77
13.5.7 External Bus Timing ............................................................................................................................................ 78
13.5.8 Base Timer Input Timing ..................................................................................................................................... 85
13.5.9 CSIO/UART Timing ............................................................................................................................................. 86
13.5.10 External Input Timing ....................................................................................................................................... 94
13.5.11 I
2
C Timing ........................................................................................................................................................ 95
13.5.12 ETM Timing ..................................................................................................................................................... 96
13.5.13 JTAG Timing .................................................................................................................................................... 97
13.6 12-bit A/D Converter ........................................................................................................................................... 98
13.7 USB Characteristics ......................................................................................................................................... 101
13.8 Low-Voltage Detection Characteristics ............................................................................................................. 105
13.8.1 Interrupt of Low-Voltage Detection .................................................................................................................... 106
13.9 Flash Memory Write/Erase Characteristics ...................................................................................................... 107
13.9.1 Write / Erase time.............................................................................................................................................. 107
13.9.2 Write cycles and data hold time ........................................................................................................................ 107
13.10 Return Time from Low-Power Consumption Mode ........................................................................................... 108
13.10.1 Return Factor: Interrupt/WKUP ...................................................................................................................... 108
13.10.2 Return Factor: Reset ..................................................................................................................................... 109
14. Ordering Information ........................................................................................................................................ 111
Document Number: 002-05631 Rev *B
Page 4 of 128
京公网安备 11010802033920号
EEWORLD
