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DESCRIPTION
The WM8326 is an integrated power-management subsystem
which provides a cost-effective, flexible, single-chip solution for
power management. It is specifically targeted at the
requirements of a range of low-power portable consumer
products, but is suitable to any application with a multimedia
processor. The WM8326 is designed to operate as a system
PMIC supporting the ARM9™, ARM11™ and ARM Cortex-A™
processors, but is also capable of supporting the majority of
application and mobile processors at the heart of a wide range
of low-power consumer multimedia applications.
The start-up behaviour and configuration is fully programmable
in an integrated OTP non-volatile memory. This highly flexible
solution helps reduce time-to-market, as changing application
requirements can be very easily accommodated in the OTP.
TM
The InstantConfig interface enables an external EEPROM to
configure the WM8326.
The WM8326 power management subsystem comprises four
programmable DC-DC converters and eleven LDO regulators
(four of which are low-noise for supplying sensitive analogue
subsystems). The integrated OTP bootstrap circuitry controls
the start-up sequencing and voltages of the converters and
regulators as well as the sequencing of system clocks.
The DC-DC converters deliver high performance and high
efficiency across a wide range of operating conditions. They
are optimised to support the high load current transients seen
in modern processor core domains. DC-DC3 / DC-DC4 can be
connected together and operated in ‘dual’ mode to support an
increased current load of up to 1.6A
An on-chip regulator provides power for always-on PMIC
functions such as register map and the RTC. The device
provides autonomous backup battery switchover. A low-power
LDO is included to support ‘Alive’ processor power domains
external to the WM8326.
A 12-bit Auxiliary ADC supports a wide range of applications
for internal as well as external analogue sampling, such as
voltage detection and temperature measurement.
WM8326 includes a crystal oscillator and an internal RC
oscillator to generate all clock signals for autonomous system
start-up and processor clocking. A Secure Real-time Clock (S-
RTC) and alarm function is included, capable of waking up the
system from low-power modes. A watchdog function is
provided to ensure system integrity.
To maximise battery life, highly-granular power management
enables each function in the WM8326 subsystem to be
independently powered down through a control interface or
alternatively through register and OTP-configurable GPIOs.
The device offers a standby power consumption of <7uA,
making it particularly suitable for portable applications.
The WM8326 is supplied in an 8x8mm 81-lead QFN package,
ideal for use in portable systems. The WM8326 forms part of
the Wolfson series of audio and power management solutions,
and is widely register compatible with the WM831X devices.
WM8326
Processor Power Management Subsystem
FEATURES
Power Management
2 x DC-DC synchronous buck converters
(0.6V - 1.8V, 2.5A, DVS)
2 x DC-DC synchronous buck converters
(0.85V - 3.4V, 1A)
1 x LDO regulator (0.9V - 3.3V, 300mA, 1)
2 x LDO regulators (0.9V - 3.3V, 200mA, 1)
3 x LDO regulators (0.9V - 3.3V, 100mA, 2)
2 x Low-noise LDO regulators (1.0V - 3.5V, 200mA, 1)
2 x Low-noise LDO regulators (1.0V - 3.5V, 150mA, 2)
1 x ‘Alive’ regulator (0.8V – 1.55V, up to 25mA)
System Control
I C or SPI compatible primary control interface
Comprehensive interrupt scheme
Watchdog timer and system reset control
Autonomous power sequencing and fault detection
OTP memory bootstrap configuration function
2
Additional Features
Auxiliary ADC for multi-function analogue measurement
128-bit pseudo-random unique ID
Secure Real-Time Clock with wake-up alarm
12 x configurable multi-function (GPIO) pins
Comprehensive clocking scheme: low-power 32kHz RTC
crystal oscillator, GPIO clock output and 4MHz RC clock
for power management
System LED outputs indicating device power state, and
fault status
Package Options
8 x 8 x 0.85mm, 81-lead QFN package
APPLICATIONS
Cellular Handsets
Smartphones
Electronic Books
Portable Media Players
Mobile Internet Devices
Electronic Gaming Devices
Netbooks
Smartbooks
Set Top Box
Digital Picture Frames
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Production Data, June 2012, Rev 4.0
Copyright
2012
Wolfson Microelectronics plc
WM8326
BLOCK DIAGRAM
CS
SDA1
SCLK1
SDOUT1
CIFMODE
DC1GND
DC1FB
DC1LX
DC1VDD
DC2GND
DC2FB
DC2LX
DC2VDD
DC4GND
DC4FB
DC4LX
DC4VDD
DC3GND
DC3FB
DC3LX
DC3VDD
IRQ
RESET
Production Data
SDA2
SCLK2
DBVDD
Interrupt and
Reset Controller
Primary Control
Interface
PROGVDD
System
Status
LED
Driver
Instant
Config
TM
EEPROM
Interface
DC-DC1
Buck
0.6 to 1.8V
2.5A
DVS
DC-DC2
Buck
0.6 to 1.8V
2.5A
DVS
DC-DC3
Buck
0.85 to 3.4V
1A
DC-DC4
Buck
0.85 to 3.4V
1A
GND
(Exposed Ground Paddle)
Dual Mode Control
LED1
LED2
Register Map and
Application Processor
Interface
OTP NVM
Bootstrap
Config &
Unique ID
References
VREFC
IREFR
LDO 1
Standard LDO
0.9 to 3.3V 300mA
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
Multi-
Function Pin
(GPIO)
Controller
Power
Management
Control
1 to 4MHz
RC
Oscillator
WM8326
LDO 2
Standard LDO
0.9 to 3.3V 200mA
LDO 3
Standard LDO
0.9 to 3.3V 200mA
LDO1VOUT
LDO1_2VDD
LDO2VOUT
LDO3VDD
LDO3VOUT
LDO4VDD
LDO4VOUT
LDO5VDD
LDO5VOUT
LDO6VDD
LDO6VOUT
LDO7VOUT
LDO7_8VDD
LDO8VOUT
LDO9VOUT
LDO9_10VDD
LDO10VOUT
LDO11VOUT
LDO12VOUT
(Backup Battery Connection)
LDO13VOUT
`
PM Sub-
System
Monitoring
LDO 4
Standard LDO
0.9 to 3.3V 100mA
LDO 5
Standard LDO
0.9 to 3.3V 100mA
LDO 6
Standard LDO
0.9 to 3.3V 100mA
ON
AP Interface, GPIOs and PM Control
LDO 7
Analogue LDO
1.0 to 3.5V 200mA
LDO 8
Analogue LDO
1.0 to 3.5V 200mA
GPIO10
GPIO11
GPIO12
CHIP temperature
XTO
XTI
XOSCGND
CLKOUT
TEST
(test function only)
Clocking and Auxiliary ADC Functions
LDO 9
Analogue LDO
1.0 to 3.5V 150mA
Aux
ADC
LDO 10
Analogue LDO
1.0 to 3.5V 150mA
LDO 11
Alive LDO
0.8 to 1.55V 25mA
Real-Time
Clock
Wake-Up
Timer
LDO 12
Internal LDO
2.1V 2mA
LDO 13
Internal LDO
2.5V 20mA
Internal Power Source
Management
Power Management
32.768kHz
Oscillator
PVDD
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Production Data
WM8326
TYPICAL APPLICATIONS
The WM8326 is designed as a system PMIC device that generates configurable DC supplies to
power processors and associated peripherals within a system. The WM8326 provides four DC-DC
synchronous buck (step-down) converters. Two of these can operate in dual mode, providing an
increased current capability. Eleven LDO regulators provide a high degree of flexibility to provide
power to multiple devices, with the capability to power-up and power-down different circuits
independently.
Two of the DC-DC buck converters incorporate Wolfson’s BuckWise
technology specifically
designed to handle rapid changes in load current; programmable slew rate DVS is also provided, as
required by modern application processors. Selectable operating modes on all of the DC-DC
converters allow each converter to be optimally configured for light, heavy or transient load
conditions. Flexible operating configurations allow the converters to be tailored for minimum PCB
area, maximum performance, or for maximum efficiency. The analogue LDOs provide low-noise
outputs suitable for powering sensitive circuits such as RF / Wi-Fi / cellular handset applications.
The WM8326 powers up the converters and LDOs according to a programmable sequence. A
configurable ‘SLEEP’ state is also available, providing support for an alternate configuration, typically
for low-power / standby operation. The power control sequences and many other parameters can be
stored in an integrated user-configurable OTP (One-Time Programmable) memory or may be loaded
from an external memory. The WM8326 supports the programming and verification of the integrated
OTP memory.
A backup battery supply can be connected to the WM8326 in order to maintain the Real Time Clock
(RTC) in the absence of the primary supply.
Programmable GPIO pins may be configured as hardware inputs for general use or for selecting
different power management configurations. As outputs, the GPIOs can provide indications of the
device status, or may be used as control signals for other power management circuits. The WM8326
also provides two LED drivers, which can be controlled manually or configured as status indicators for
the OTP memory programmer or operating power state.
TM
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WM8326
TABLE OF CONTENTS
Production Data
DESCRIPTION ....................................................................................................... 1
FEATURES ............................................................................................................ 1
APPLICATIONS..................................................................................................... 1
BLOCK DIAGRAM ................................................................................................ 2
TYPICAL APPLICATIONS .................................................................................... 3
TABLE OF CONTENTS ......................................................................................... 4
1
PIN CONFIGURATION.................................................................................. 8
2
ORDERING INFORMATION ......................................................................... 8
3
PIN DESCRIPTION ....................................................................................... 9
4
THERMAL CHARACTERISTICS ................................................................ 13
5
ABSOLUTE MAXIMUM RATINGS.............................................................. 14
6
RECOMMENDED OPERATING CONDITIONS .......................................... 15
7
ELECTRICAL CHARACTERISTICS ........................................................... 16
DC-DC SYNCHRONOUS BUCK CONVERTERS ............................................... 16
LDO REGULATORS ............................................................................................ 18
RESET THRESHOLDS ....................................................................................... 22
REFERENCES .................................................................................................... 22
GENERAL PURPOSE INPUTS / OUTPUTS (GPIO)........................................... 23
DIGITAL INTERFACES ....................................................................................... 24
AUXILIARY ADC.................................................................................................. 24
SYSTEM STATUS LED DRIVERS ...................................................................... 24
8
TYPICAL POWER CONSUMPTION ........................................................... 25
9
TYPICAL PERFORMANCE DATA.............................................................. 26
9.1 DC-DC CONVERTERS ....................................................................................... 26
9.2 LDO REGULATORS ............................................................................................ 26
10
SIGNAL TIMING REQUIREMENTS ............................................................ 27
10.1 CONTROL INTERFACE ................................................................................... 27
11
DEVICE DESCRIPTION .............................................................................. 29
11.1 GENERAL DESCRIPTION ............................................................................... 29
11.2 POWER STATES ............................................................................................. 29
11.3 POWER STATE CONTROL ............................................................................. 31
11.4 POWER STATE INTERRUPTS........................................................................ 36
11.5 POWER STATE GPIO INDICATION ................................................................ 36
11.6 ON PIN FUNCTION .......................................................................................... 37
11.7 RESET PIN FUNCTION ................................................................................... 38
12
CONTROL INTERFACE.............................................................................. 40
12.1 GENERAL DESCRIPTION ............................................................................... 40
12.2 2-WIRE (I2C) CONTROL MODE ...................................................................... 40
12.3 4-WIRE (SPI) CONTROL MODE ...................................................................... 43
12.4 REGISTER LOCKING ...................................................................................... 43
12.5 SOFTWARE RESET AND CHIP ID .................................................................. 44
12.6 SOFTWARE SCRATCH REGISTER ................................................................ 44
13
CLOCKING AND OSCILLATOR CONTROL .............................................. 45
13.1 GENERAL DESCRIPTION ............................................................................... 45
13.2 CRYSTAL OSCILLATOR INTERRUPTS ......................................................... 47
13.3 CRYSTAL OSCILLATOR CONNECTIONS ...................................................... 48
14
INSTANTCONFIG™ (ICE) AND OTP MEMORY CONTROL ...................... 49
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
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Production Data
WM8326
GENERAL DESCRIPTION ............................................................................... 49
ICE AND OTP MEMORY DEFINITION ............................................................ 49
BOOTSTRAP (START-UP) FUNCTION ........................................................... 50
14.3.1
START-UP FROM OTP MEMORY ...................................................................................... 50
14.3.2
START-UP FROM ICE MEMORY (DEVELOPMENT MODE).............................................. 51
14.3.3
START-UP FROM DCRW REGISTER SETTINGS ............................................................. 51
14.3.4
EXTERNAL ICE MEMORY CONNECTION ......................................................................... 51
14.4 OTP / ICE MEMORY CONTROL ...................................................................... 52
14.4.1
ENTERING / EXITING THE PROGRAM STATE ................................................................. 53
14.4.2
OTP / ICE READ COMMAND .............................................................................................. 53
14.4.3
OTP WRITE COMMAND ..................................................................................................... 54
14.4.4
OTP VERIFY COMMAND .................................................................................................... 54
14.4.5
OTP FINALISE COMMAND ................................................................................................. 55
14.4.6
OTP CONTROL REGISTER ................................................................................................ 55
14.5 OTP / ICE INTERRUPTS ................................................................................. 57
14.6 DCRW MEMORY CONTENTS ......................................................................... 57
14.6.1
DCRW PAGE 0 .................................................................................................................... 57
14.6.2
DCRW PAGE 1 .................................................................................................................... 58
14.6.3
DCRW PAGE 2 .................................................................................................................... 58
14.6.4
DCRW PAGE 3 .................................................................................................................... 59
14.6.5
DCRW PAGE 4 .................................................................................................................... 61
15
POWER MANAGEMENT ............................................................................ 62
15.1 GENERAL DESCRIPTION ............................................................................... 62
15.2 DC-DC CONVERTER AND LDO REGULATOR ENABLE ............................... 62
15.3 TIMESLOT CONTROL AND HARDWARE ENABLE (GPIO) CONTROL ......... 63
15.4 OPERATING MODE CONTROL ...................................................................... 64
15.4.1
DC-DC SYNCHRONOUS BUCK CONVERTERS ................................................................ 64
15.4.2
LDO REGULATORS ............................................................................................................ 64
15.5 OUTPUT VOLTAGE CONTROL ...................................................................... 64
15.5.1
DC-DC SYNCHRONOUS BUCK CONVERTERS ................................................................ 64
15.5.2
LDO REGULATORS 1-10 .................................................................................................... 65
15.5.3
LDO REGULATOR 11 .......................................................................................................... 65
15.6 DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL ............................ 65
15.6.1
DC-DC3 / DC-DC4 DUAL MODE ......................................................................................... 66
15.7 LDO REGULATOR CONTROL ........................................................................ 67
15.8 HARDWARE CONTROL (GPIO) ...................................................................... 67
15.9 FAULT PROTECTION ...................................................................................... 68
15.10 MONITORING AND FAULT REPORTING ....................................................... 68
15.11 POWER MANAGEMENT REGISTER DEFINITIONS ...................................... 69
15.11.1
DC-DC CONVERTER AND LDO REGULATOR ENABLE ................................................... 69
15.11.2
DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL ................................................ 69
15.11.3
LDO REGULATOR CONTROL ............................................................................................ 76
15.11.4
EXTERNAL POWER ENABLE (EPE) CONTROL ................................................................ 84
15.11.5
MONITORING AND FAULT REPORTING ........................................................................... 85
15.12 POWER MANAGEMENT INTERRUPTS ......................................................... 86
15.13 POWER GOOD INDICATION .......................................................................... 88
15.14 DC-DC SYNCHRONOUS BUCK CONVERTER OPERATION ........................ 90
15.14.1
OVERVIEW .......................................................................................................................... 90
15.14.2
DC-DC SYNCHRONOUS BUCK CONVERTERS ................................................................ 90
15.15 LDO REGULATOR OPERATION ..................................................................... 94
15.15.1
OVERVIEW .......................................................................................................................... 94
15.15.2
LDO REGULATORS ............................................................................................................ 95
16
RESERVED ................................................................................................. 96
17
POWER SUPPLY CONTROL ..................................................................... 97
14.1
14.2
14.3
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