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Ultrasonic-Flow-Converter
Data Sheet
TDC-GP30
System-Integrated Solution for Ultrasonic Flow Meters
Volume 1: General Data and Frontend Description
July 31th, 2015
Document-No: DB_GP30Y_Vol1_en V0.1
UFC
TDC-GP30
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Ultrasonic Flow Converter
Notational Conventions
Vol. 1
TDC-GP30
Throughout the GP30 documentation, the following stile formats are used to support efficient reading
and understanding of the documents:
Hexadecimal numbers are denoted by a leading 0x, e.g. 0xAF = 175 as decimal number.
Decimal numbers are given as usual.
Binary numbers are denoted by a leading 0b, e.g. 0b1101 = 13. The length of a binary
number can be given in bit (b) or Byte (B), and the four bytes of a 32b word are denoted B0,
B1, B2 and B3 where B0 is the lowest and B3 the highest byte.
Abbreviations and expressions which have a special or uncommon meaning within the
context of GP30 application are listed and shortly explained in the list of abbreviations, see
following page. They are written in plain text. Whenever the meaning of an abbreviation or
expression is unclear, please refer to the glossary at the end of this document.
Variable names
for hard coded registers and flags are in bold. Meaning and location of
these variables is explained in the datasheet (see registers CR, SRR and SHR).
Variable names
which represent memory or code addresses are in bold italics. Many of
these addresses have a fixed value inside the ROM code, others may be freely defined by
software. Their meaning is explained in the firmware and ROM code description, and their
physical addresses can be found in the header files. These variable names are defined by
the header files and thus known to the assembler as soon as the header files are included in
the assembler source code. Note that different variable names may have the same address,
especially temporary variables.
Physical variables
are in italics (real times, lengths, flows or temperatures).
1
Ultrasonic Flow Converter
Abbrevations
AM
CD
CPU
CR
CRC
DIFTOF,
DIFTOF_ALL
DR
FEP
FDB
FHL
FW
FWC
FWD
FWD-RAM
GPIO
Hit
HSO
INIT
IO
I2C
LSO
MRG
NVRAM, NVM
PI
PP
PWR
R
RAA
RAM
RI
ROM
ROM code
SHR
SPI
SRAM
SRR
SUMTOF
Task
TDC
TOF, TOF_ALL
TS
TM
UART
USM
V
ref
X,Y,Z
ZCD
Amplitude measurement
Configuration Data
Central Processing Unit
Configuration Register
Cyclic Redundancy Check
Difference of up and down ->TOF
Vol. 1
TDC-GP30
Debug Register
Frontend Processing
Frontend data buffer
First hit level (physical value
V
FHL
)
Firmware, software stored on the chip
Firmware Code
Firmware Data
Firmware Data memory
General purpose input/output
Stands for a detected wave period
High speed oscillator
Initialization process of ->CPU or -> FEP
Input/output
Inter-Integrated Circuit bus
Low speed oscillator
Measurement Rate Generator
Programmable Non-Volatile Memory
Pulse interface
Post Processing
Pulse width ratio
RAM address pointer of the CPU, can also stand for the addressed
register
Random Access Area
Random Access Memory
Remote Interface
Read Only Memory
Hard coded routines in ROM
System Handling Register
Serial Peripheral Interface
Static RAM
Status & Result Register
Sum of up and down TOF
Process, job
Time-to-digital-converter
Time of Flight
Task Sequencer
Temperature measurement
Universal Asynchronous Receiver & Transmitter
Ultrasonic measurement
Reference voltage
Internal registers of the CPU
Zero cross detection, physical level
V
ZCD
For details see the glossary in section 9.
2
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