Available at Digi-Key
www.digikey.com
5x7mm
Precision TCXO
Model DV75C
Description:
Features:
DV
75
12 C 12
.8
MH 02
Z
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
The Connor-Winfield’s DV75C is a 5x7mm
Surface Mount Temperature Compensated
Crystal Controlled Oscillator (TCXO) with
LVCMOS output. Through the use of Analog
Temperature Compensation the DV75C is
capable of holding sub 1-ppm stabilities
over the -40 to 85°C temperature range. The
DV75C meets STRATUM 3 requirements.
•
3.3 Vdc Operation
•
LVCMOS Output
•
Frequency Stability: ± 0.28 ppm
•
Temperature Range: -40 to 85°C
•
Low Jitter <1ps RMS
•
5x7mm Surface Mount Package
•
Tape and Reel Packaging
•
RoHS Compliant / Pb Free
Applications:
•
IEEE 1588 Applications
•
Synchronous Ethernet slave clocks, ITU-T G.8262 EEC options 1 & 2
•
Compliant to Stratum 3, GR-1244-CORE, GR-253-CORE & ITU-T-G.812 Type IV
•
Wireless Communications
•
Small Cells
•
Test and Measurement
Parameter
Storage Temperature
Supply Voltage (Vcc)
Input Voltage
Absolute Maximum Ratings
Minimum
-55
-0.5
-0.5
Nominal
-
-
-
Maximum
85
6.0
Vcc+0.5
Units
°C
Vdc
Vdc
Notes
Parameter
Nominal Frequencies (Fo) available
Frequency Calibration @ 25 °C
Frequency Stability vs. Temperature
Holdover Stability (Over 24 Hours)
Frequency vs. Load Stability
Frequency vs. Voltage Stability
Static Temperature Hysteresis
Total Frequency Tolerance:
Operating Temperature Range:
Supply Voltage (Vcc)
Supply Current (Icc)
Period Jitter
Integrated Phase Jitter
Typical Phase Noise Fo = 10.0 MHz
SSB Phase Noise at 10Hz offset
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at 100KHz offset
Start-up Time
Minimum
Operating Specifications
Nominal
Maximum
Units
MHz
ppm
ppm
ppm
ppm
ppm
ppm
ppm
°C
Vdc
mA
ps rms
ps rms
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ms
Notes
1
2
3
±5%
±5%
4
5
±5%
10.0, 12.8, 20.0, 25.0 and 40.0
-1.0
-
1.0
-0.28
-
0.28
-0.32
-
0.32
-0.05
-
0.05
-0.05
-
0.05
-
-
0.4
-4.6
-
4.6
-40
-
85
3.135
3.3
3.465
-
-
6
-
3
5
-
0.5
1.0
-
-
-
-
-
-
-99
-122
-145
-152
-153
-
-
-
-
-
-
10
6
LVCMOS Output Characteristics
Parameter
Load
Voltage (High) (Voh)
(Low)
(Vol)
Duty Cycle at 50% of Vcc
Rise / Fall Time 10% to 90%
Minimum
-
90%Vcc
-
45
-
Nominal
15
-
-
50
-
Maximum
-
-
10%Vcc
55
8
Units
pF
Vdc
Vdc
%
ns
Notes
7
Bulletin
Page
Revision
Date
Tx355
1 of 4
06
10 Nov 2016
Notes:
1. Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation.
2. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)].
3. Inclusive of frequency stability, supply voltage change (±1%), load change, aging, for 24 hours.
4. Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C.
5. Inclusive of calibration @ 25C, frequency vs. change in temperature, change in supply voltage (±5%), load change (±5%), reflow soldering
process and 20 years aging, referenced to Fo
6. BW = 12 KHz to Fo/2 MHz.
7. For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF.
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Package Characteristics
Package
Hermetically sealed crystal mounted on a ceramic package
Environmental Characteristics
Vibration:
Shock:
Soldering Process:
Vibration per Mil Std 883E Method 2007.3 Test Condition A
Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B.
RoHS compliant lead free. See soldering profile on page 3.
Ordering Information
DV75C-010.0M, DV75C-012.8M, DV75C-020.0M, DV75C-025.0M, DV75C-040.0M
Phase Noise Information
TIE
DV75C-010.0M: WANDER GENERATION IN A STRATUM 3 PLL AT 0.098 Hz BANDWIDTH
MTIE
DV75C-010.0M: MTIE per GR-253-CORE
TDEV
DV75C-010.0M: TDEV per GR-253-CORE
Bulletin
Page
Revision
Date
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2016 The Connor-Winfield Corporation
Not intended for life support applications.
Tx355
2 of 4
06
10 Nov 2016
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Package Layout
Applies to all frequencies except for 40.0MHz
0.276 ±0.006
(7.0mm)
(Top View)
0.079 Max.
(2.0mm)
Suggested Pad Layout
0.071
(1.8mm)
4 Places
Pad Connections
1: N/C
2: Ground
3: Output (Fo)
4: Supply Voltage (Vcc)
4
3
DV75C 1202
12.8 MHZ
Pad 1
0.197
±0.006
(5.0mm)
0.165
(4.2mm)
(Top View)
0.047
(1.2mm)
4 Places
Keep
Out *
Area
1
1
2
0.224
(5.7mm)
2
0.034
(0.90mm)
(4 Places)
(Bottom View)
4
3
Dimensional Tolerance:
±.005 (.127mm)
±.02 (.508mm)
* Do not route any traces in the keep out area.
It is recommended the next layer under the
keep out area is to be ground plane.
0.055
(1.40mm)
(4 Places)
Alternate Package Layout
Applies to 40.0MHz frequency only.
0.276 ±0.006
(7.0mm)
0.095
(2.4mm)
Vcc
Supply
Voltage
0.1 uF
Bypass
DV75C 1511
40.0 MHz
Test Circuit
Output Waveform
10 nF
Bypass
4
3
15 pF
Output
0.197
±0.006
(5.0mm)
N/C
1
2
1V/Div
Design Recommendations
Vcc, should have
a large copper
area for reduced
inductance.
Connect a 0.01uF
bypass capacitor
<0.1”(2.54mm)
from the pad.
Solder Profile
Temperature
0.010”(0.254mm)
Recommended
clearance
inductance
for internal
copper flood.
4
3
Vcc
50 Ohm trace
<1”by design
Buffer
260°C
220°C
180°C
150°C
120°C
260°C
9
5
10
1
4
2
Ground
Ground,
should have
a large copper
area for reduced
inductance.
Top View
Top View
Ground
0
10 s
Up to 120 s
60 to 90 s
Typical
Typical
OSC
TOP LAYER
GROUND LAYER
50 Ohm Trace
Without Output
Vias
Buffer
Meets IPC/JEDEC J-STD-020C
.......
BOTTOM LAYER
Attention: To achieve optimal frequency stability, and in some cases to meet the specification stated on this data
sheet, it is required that the circuit connected to this TCXO output must have the equivalent input capacitance that is
specified by the nominal load capacitance. Deviations from the nominal load capacitance will have a graduated effect
on the stability of approximately 20 ppb per pF load difference.
Bulletin
Page
Revision
Date
Tx355
3 of 4
06
10 Nov 2016
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2016 The Connor-Winfield Corporation
Not intended for life support applications.
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Tape and Reel Dimensions
PIN 1
(17.5mm)
.69
(216mm DIA)
8.46 DIA
(2.0mm)
.08
(2.0mm)
.21
(5.4mm)
.08
(7.9mm)
.31
(250mm DIA)
9.84 DIA
(4.0mm)
(2.0mm)
.157
.08
(80mm)
3.15
(8.0mm)
.315
Direction
Of
Feed
(Customer)
(1.5mm DIA)
.06 DIA
(25mm DIA)
.295 (7.5mm)
1.00 DIA
MEETS EIA-481A and EIAJ-1009B
2,000 PCS/REEL
.07 (1.75mm)
.83 (16.0mm)
Revision History
Revision
Date
00
01
02
03
04
05
06
01/11/12
11/26/12
04/15/13
12/03/13
04/01/15
11/01/16
11/10/16
Note
Data sheet released
Removed tri-state information from features and description.
Added "Applications", Phase noise, TIE, MTIE and TDEV plots.
Removed TR information from Ordering Information.
Add frequencies and update to Phase Noise Plot and Operating Specs
Clarify frequencies to which alternate package height applies, and
added dimensions to bottom view.
Update Static Temperature Hysteresis note and Soldering Process information.
Bulletin
Page
Revision
Date
Tx355
4 of 4
06
10 Nov 2016
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2016 The Connor-Winfield Corporation
Not intended for life support applications.
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