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XCV50E-8FG256I

Description
FPGA, 1536 CLBS, 82944 GATES, 400 MHz, PQFP240
CategoryProgrammable logic devices    Programmable logic   
File Size64KB,5 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
Download Datasheet Parametric View All

XCV50E-8FG256I Overview

FPGA, 1536 CLBS, 82944 GATES, 400 MHz, PQFP240

XCV50E-8FG256I Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerXILINX
Parts packaging codeBGA
package instructionFBGA-256
Contacts256
Reach Compliance Codenot_compliant
maximum clock frequency416 MHz
Combined latency of CLB-Max0.4 ns
JESD-30 codeS-PBGA-B256
JESD-609 codee0
length17 mm
Humidity sensitivity level3
Configurable number of logic blocks384
Equivalent number of gates20736
Number of entries176
Number of logical units1728
Output times176
Number of terminals256
organize384 CLBS, 20736 GATES
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA256,16X16,40
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)225
power supply1.2/3.6,1.8 V
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height2 mm
Maximum supply voltage1.89 V
Minimum supply voltage1.71 V
Nominal supply voltage1.8 V
surface mountYES
technologyCMOS
Terminal surfaceTin/Lead (Sn63Pb37)
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
width17 mm
0
R
Virtex™-E 1.8 V
Field Programmable Gate Arrays
0
0
DS022-1 (v2.2) November 9, 2001
Preliminary Product Specification
Features
Fast, High-Density 1.8 V FPGA Family
- Densities from 58 k to 4 M system gates
- 130 MHz internal performance (four LUT levels)
- Designed for low-power operation
- PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz
Highly Flexible SelectI/O+™ Technology
- Supports 20 high-performance interface standards
- Up to 804 singled-ended I/Os or 344 differential I/O
pairs for an aggregate bandwidth of > 100 Gb/s
Differential Signalling Support
- LVDS (622 Mb/s), BLVDS (Bus LVDS), LVPECL
- Differential I/O signals can be input, output, or I/O
- Compatible with standard differential devices
- LVPECL and LVDS clock inputs for 300+ MHz
clocks
Proprietary High-Performance SelectLink™
Technology
- Double Data Rate (DDR) to Virtex-E link
- Web-based HDL generation methodology
Sophisticated SelectRAM+™ Memory Hierarchy
- 1 Mb of internal configurable distributed RAM
- Up to 832 Kb of synchronous internal block RAM
- True Dual-Port™ BlockRAM capability
- Memory bandwidth up to 1.66 Tb/s (equivalent
bandwidth of over 100 RAMBUS channels)
- Designed for high-performance Interfaces to
External Memories
- 200 MHz ZBT* SRAMs
- 200 Mb/s DDR SDRAMs
- Supported by free Synthesizable reference design
* ZBT is a trademark of Integrated Device Technology, Inc.
High-Performance Built-In Clock Management Circuitry
- Eight fully digital Delay-Locked Loops (DLLs)
- Digitally-Synthesized 50% duty cycle for Double
Data Rate (DDR) Applications
- Clock Multiply and Divide
- Zero-delay conversion of high-speed LVPECL/LVDS
clocks to any I/O standard
Flexible Architecture Balances Speed and Density
- Dedicated carry logic for high-speed arithmetic
- Dedicated multiplier support
- Cascade chain for wide-input function
- Abundant registers/latches with clock enable, and
dual synchronous/asynchronous set and reset
- Internal 3-state bussing
- IEEE 1149.1 boundary-scan logic
- Die-temperature sensor diode
Supported by Xilinx Foundation™ and Alliance Series™
Development Systems
- Further compile time reduction of 50%
- Internet Team Design (ITD) tool ideal for
million-plus gate density designs
- Wide selection of PC and workstation platforms
SRAM-Based In-System Configuration
- Unlimited re-programmability
Advanced Packaging Options
- 0.8 mm Chip-scale
- 1.0 mm BGA
- 1.27 mm BGA
- HQ/PQ
0.18
m
m 6-Layer Metal Process
100% Factory Tested
© 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS022-1 (v2.2) November 9, 2001
Preliminary Product Specification
www.xilinx.com
1-800-255-7778
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