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DSPIC33EP16GS202T-E/SS

Description
IC MCU 16BIT 16KB FLASH 28SSOP
Categorysemiconductor    The embedded processor and controller   
File Size3MB,344 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Download user manual Parametric View All

DSPIC33EP16GS202T-E/SS Overview

IC MCU 16BIT 16KB FLASH 28SSOP

DSPIC33EP16GS202T-E/SS Parametric

Parameter NameAttribute value
core processordsPIC
core size16-bit
speed60 MIPs
ConnectivityI²C,IrDA,LINbus,SPI,UART/USART
PeripheralUndervoltage detection/reset, POR, PWM, WDT
Number of I/Os21
Program storage capacity16KB(16K x 8)
Program memory typeflash memory
EEPROM capacity-
RAM capacity2K x 8
Voltage - Power Supply (Vcc/Vdd)3 V ~ 3.6 V
data converterA/D 12x12b,A/D 2x12b
Oscillator typeinternal
Operating temperature-40°C ~ 125°C(TA)
Package/casing28-SSOP (0.209", 5.30mm wide)
Supplier device packaging28-SSOP
dsPIC33EPXXGS202 FAMILY
16-Bit Digi
tal Signal Controllers for Digital Power Applications with
Interconne
cted High-Speed PWM, ADC, PGA and Comparators
Operating Conditions
• 3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS
• 3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS
Advanced Analog Features
• High-Speed ADC module:
- 12-bit with 2 dedicated SAR ADC cores and
one shared SAR ADC core
- Up to 3.25 Msps conversion rate per ADC core @
12-bit resolution
- Dedicated result buffer for each analog
channel
- Flexible and independent ADC trigger
sources
- Two digital comparators
- One oversampling filter
• Two Rail-to-Rail Comparators with Hysteresis:
- Dedicated 12-bit Digital-to-Analog Converter
(DAC) for each analog comparator
• Two Programmable Gain Amplifiers:
- Single-ended or independent ground
reference
- Five selectable gains (4x, 8x, 16x, 32x
and 64x)
- 40 MHz gain bandwidth
Flash Architecture
• 16 Kbytes-32 Kbytes of Program Flash
Core: 16-Bit dsPIC33E CPU
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL Plus
Hardware Divide
• 32-Bit Multiply Support
• Two Additional Working Register Sets (reduces
context switching)
Clock Management
±0.9% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Interconnected SMPS Peripherals
• Reduces CPU Interaction to Improve Performance
• Flexible PWM Trigger Options for
ADC Conversions
• High-Speed Comparator Truncates PWM
(15 ns typical):
- Supports Cycle-by-Cycle Current mode control
- Current Reset mode (variable frequency)
Power Management
• Low-Power Management modes (Sleep,
Idle, Doze)
• Integrated Power-on Reset and Brown-out Reset
• 0.5 mA/MHz Dynamic Current (typical)
• 10
μA
I
PD
Current (typical)
High-Speed PWM
• Three PWM Generators (two outputs per
generator)
• Individual Time Base and Duty Cycle for each PWM
• 1.04 ns PWM Resolution (frequency, duty cycle,
dead time and phase)
• Supports Center-Aligned, Redundant, Complementary
and True Independent Output modes
• Independent Fault and Current-Limit Inputs
• Output Override Control
• PWM Support for:
- AC/DC, DC/DC, inverters, PFC, lighting
Timers/Output Compare/Input Capture
• Three 16-Bit and One 32-Bit Timers/Counters
• One Output Compare (OC) module, Configurable
as Timers/Counters
• One Input Capture (IC) module
2015-2018 Microchip Technology Inc.
DS70005208E-page 1

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