Artix-7 FPGAs Data Sheet:
DC and AC Switching Characteristics
DS181 (v1.25) June 18, 2018
Product Specification
Introduction
Artix®-7 FPGAs are available in -3, -2, -1, -1LI, and -2L
speed grades, with -3 having the highest performance. The
Artix-7 FPGAs predominantly operate at a 1.0V core voltage.
The -1LI and -2L devices are screened for lower maximum
static power and can operate at lower core voltages for
lower dynamic power than the -1 and -2 devices,
respectively. The -1LI devices operate only at
V
CCINT
= V
CCBRAM
= 0.95V and have the same speed
specifications as the -1 speed grade. The -2L devices can
operate at either of two V
CCINT
voltages, 0.9V and 1.0V and
are screened for lower maximum static power. When
operated at V
CCINT
= 1.0V, the speed specification of a -2L
device is the same as the -2 speed grade. When operated at
V
CCINT
= 0.9V, the -2L static and dynamic power is reduced.
Artix-7 FPGA DC and AC characteristics are specified in
commercial, extended, industrial, expanded (-1Q), and
military (-1M) temperature ranges. Except the operating
temperature range or unless otherwise noted, all the DC
and AC electrical parameters are the same for a particular
speed grade (that is, the timing characteristics of a -1M
speed grade military device are the same as for a -1C speed
grade commercial device). However, only selected speed
grades and/or devices are available in each temperature
range. For example, -1M is only available in the
defense-grade Artix-7Q family and -1Q is only available in
XA Artix-7 FPGAs.
All supply voltage and junction temperature specifications
are representative of worst-case conditions. The parameters
included are common to popular designs and typical
applications.
Available device and package combinations can be found in:
•
•
•
7 Series FPGAs Overview
(DS180)
Defense-Grade 7 Series FPGAs Overview
(DS185)
XA Artix-7 FPGAs Overview
(DS197)
This Artix-7 FPGA data sheet, part of an overall set of
documentation on the 7 series FPGAs, is available on the
Xilinx website at
www.xilinx.com/documentation.
DC Characteristics
Table 1:
Absolute Maximum Ratings
(1)
Symbol
FPGA Logic
V
CCINT
V
CCAUX
V
CCBRAM
V
CCO
V
REF
V
IN
(2)(3)(4)
Description
Min
Max
Units
Internal supply voltage
Auxiliary supply voltage
Supply voltage for the block RAM memories
Output drivers supply voltage for HR I/O banks
Input reference voltage
I/O input voltage
I/O input voltage (when V
CCO
= 3.3V) for V
REF
and differential I/O standards
except TMDS_33
(5)
Key memory battery backup supply
–0.5
–0.5
–0.5
–0.5
–0.5
–0.4
–0.4
–0.5
1.1
2.0
1.1
3.6
2.0
V
CCO
+ 0.55
2.625
2.0
V
V
V
V
V
V
V
V
V
CCBATT
GTP Transceiver
V
MGTAVCC
V
MGTAVTT
V
MGTREFCLK
V
IN
Analog supply voltage for the GTP transmitter and receiver circuits
Analog supply voltage for the GTP transmitter and receiver termination circuits
Reference clock absolute input voltage
Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage
–0.5
–0.5
–0.5
–0.5
1.1
1.32
1.32
1.26
V
V
V
V
© 2011– 2018 Xilinx, Inc. XILINX, the Xilinx logo, Artix, Virtex, Kintex, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. All other trademarks are the property of their respective owners.
DS181 (v1.25) June 18, 2018
Product Specification
www.xilinx.com
Send Feedback
1
Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 1:
Absolute Maximum Ratings
(1)
(Cont’d)
Symbol
I
DCIN-FLOAT
I
DCIN-MGTAVTT
I
DCIN-GND
I
DCOUT-FLOAT
I
DCOUT-MGTAVTT
Description
DC input current for receiver input pins DC coupled RX termination = floating
DC input current for receiver input pins DC coupled RX termination = V
MGTAVTT
DC input current for receiver input pins DC coupled RX termination = GND
DC output current for transmitter pins DC coupled RX termination = floating
DC output current for transmitter pins DC coupled RX termination = V
MGTAVTT
XADC supply relative to GNDADC
XADC reference input relative to GNDADC
Min
–
–
–
–
–
Max
14
12
6.5
14
12
Units
mA
mA
mA
mA
mA
XADC
V
CCADC
V
REFP
–0.5
–0.5
2.0
2.0
V
V
Temperature
T
STG
T
SOL
T
j
Notes:
1.
2.
3.
4.
5.
6.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
The lower absolute voltage specification always applies.
For I/O operation, refer to
7 Series FPGAs SelectIO Resources User Guide
(UG471).
The maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see
Table 4.
See
Table 9
for TMDS_33 specifications.
For soldering guidelines and thermal considerations, see
7 Series FPGA Packaging and Pinout Specification
(UG475).
Storage temperature (ambient)
Maximum soldering temperature for Pb/Sn component bodies
(6)
Maximum soldering temperature for Pb-free component bodies
(6)
Maximum junction temperature
(6)
–65
–
–
–
150
+220
+260
+125
°C
°C
°C
°C
Table 2:
Recommended Operating Conditions
(1)(2)
Symbol
FPGA Logic
For -3, -2, -2LE (1.0V), -1, -1Q, -1M devices: internal supply voltage
V
CCINT(3)
V
CCAUX
V
CCBRAM(3)
V
CCO(4)(5)
V
IN
(6)
Description
Min
Typ
Max
Units
0.95
0.92
0.87
1.71
0.95
0.92
1.14
–0.20
–0.20
–
1.0
1.00
0.95
0.90
1.80
1.00
0.95
–
–
–
–
–
1.05
0.98
0.93
1.89
1.05
0.98
3.465
V
CCO
+ 0.20
2.625
10
1.89
V
V
V
V
V
V
V
V
V
mA
V
For -1LI (0.95V) devices: internal supply voltage
For -2LE (0.9V) devices: internal supply voltage
Auxiliary supply voltage
For -3, -2, -2LE (1.0V), -2LE (0.9V), -1, -1Q, -1M devices: block RAM supply
voltage
For -1LI (0.95V) devices: block RAM supply voltage
Supply voltage for HR I/O banks
I/O input voltage
I/O input voltage (when V
CCO
= 3.3V) for V
REF
and differential I/O standards
except TMDS_33
(7)
Maximum current through any pin in a powered or unpowered bank when
forward biasing the clamp diode.
Battery voltage
I
IN(8)
V
CCBATT(9)
V
MGTAVCC(10)
V
MGTAVTT(10)
GTP Transceiver
Analog supply voltage for the GTP transmitter and receiver circuits
Analog supply voltage for the GTP transmitter and receiver termination circuits
0.97
1.17
1.0
1.2
1.03
1.23
V
V
XADC
V
CCADC
XADC supply relative to GNDADC
1.71
1.80
1.89
V
DS181 (v1.25) June 18, 2018
Product Specification
www.xilinx.com
Send Feedback
2
Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 2:
Recommended Operating Conditions
(1)(2)
(Cont’d)
Symbol
V
REFP
Description
Externally supplied reference voltage
Min
1.20
Typ
1.25
Max
1.30
Units
V
Temperature
Junction temperature operating range for commercial (C) temperature devices
Junction temperature operating range for extended (E) temperature devices
T
j
Junction temperature operating range for industrial (I) temperature devices
Junction temperature operating range for expanded (Q) temperature devices
Junction temperature operating range for military (M) temperature devices
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
All voltages are relative to ground.
For the design of the power distribution system consult
7 Series FPGAs PCB Design and Pin Planning Guide
(UG483).
If V
CCINT
and V
CCBRAM
are operating at the same voltage, V
CCINT
and V
CCBRAM
should be connected to the same supply.
Configuration data is retained even if V
CCO
drops to 0V.
Includes V
CCO
of 1.2V, 1.35V, 1.5V, 1.8V, 2.5V, and 3.3V at ±5%.
The lower absolute voltage specification always applies.
See
Table 9
for TMDS_33 specifications.
A total of 200 mA per bank should not be exceeded.
V
CCBATT
is required only when using bitstream encryption. If battery is not used, connect V
CCBATT
to either ground or V
CCAUX
.
Each voltage listed requires the filter circuit described in
7 Series FPGAs GTP Transceiver User Guide
(UG482).
0
0
–40
–40
–55
–
–
–
–
–
85
100
100
125
125
°C
°C
°C
°C
°C
Table 3:
DC Characteristics Over Recommended Operating Conditions
Symbol
V
DRINT
V
DRI
I
REF
I
L
C
IN(2)
Description
Data retention V
CCINT
voltage (below which configuration data might be lost)
Data retention V
CCAUX
voltage (below which configuration data might be lost)
V
REF
leakage current per pin
Input or output leakage current per pin (sample-tested)
Die input capacitance at the pad
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 3.3V
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 2.5V
Min
0.75
1.5
–
–
–
90
68
34
23
12
68
–
–
28
35
44
Typ
(1)
–
–
–
–
–
–
–
–
–
–
–
–
–
40
50
60
Max
–
–
15
15
8
330
250
220
150
120
330
25
150
55
65
83
Units
V
V
µA
µA
pF
µA
µA
µA
µA
µA
µA
mA
nA
Ω
Ω
Ω
I
RPU
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 1.8V
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 1.5V
Pad pull-up (when selected) @ V
IN
= 0V, V
CCO
= 1.2V
I
RPD
I
CCADC
I
BATT(3)
Pad pull-down (when selected) @ V
IN
= 3.3V
Analog supply current, analog circuits in powered up state
Battery supply current
Thevenin equivalent resistance of programmable input termination to V
CCO
/2
(UNTUNED_SPLIT_40)
R
IN_TERM(4)
Thevenin equivalent resistance of programmable input termination to V
CCO
/2
(UNTUNED_SPLIT_50)
Thevenin equivalent resistance of programmable input termination to V
CCO
/2
(UNTUNED_SPLIT_60)
DS181 (v1.25) June 18, 2018
Product Specification
www.xilinx.com
Send Feedback
3
Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 3:
DC Characteristics Over Recommended Operating Conditions
(Cont’d)
Symbol
n
r
Notes:
1.
2.
3.
4.
Typical values are specified at nominal voltage, 25°C.
This measurement represents the die capacitance at the pad, not including the package.
Maximum value specified for worst case process at 25°C.
Termination resistance to a V
CCO
/2 level.
Description
Temperature diode ideality factor
Temperature diode series resistance
Min
–
–
Typ
(1)
1.010
2
Max
–
–
Units
–
Ω
Table 4:
V
IN
Maximum Allowed AC Voltage Overshoot and Undershoot for HR I/O Banks
(1)(2)
AC Voltage Overshoot
% of UI @–55°C to 125°C
AC Voltage Undershoot
–0.40
V
CCO
+ 0.55
100
–0.45
–0.50
–0.55
V
CCO
+ 0.60
V
CCO
+ 0.65
V
CCO
+ 0.70
V
CCO
+ 0.75
V
CCO
+ 0.80
V
CCO
+ 0.85
V
CCO
+ 0.90
V
CCO
+ 0.95
Notes:
1.
2.
A total of 200 mA per bank should not be exceeded.
The peak voltage of the overshoot or undershoot, and the duration above V
CCO
+ 0.20V or below GND – 0.20V, must not exceed the values
in this table.
% of UI @–55°C to 125°C
100
61.7
25.8
11.0
4.77
2.10
0.94
0.43
0.20
0.09
0.04
0.02
46.6
21.2
9.75
4.55
2.15
1.02
0.49
0.24
–0.60
–0.65
–0.70
–0.75
–0.80
–0.85
–0.90
–0.95
DS181 (v1.25) June 18, 2018
Product Specification
www.xilinx.com
Send Feedback
4
Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 5:
Typical Quiescent Supply Current
Speed Grade
Symbol
Description
Device
-3
I
CCINTQ
Quiescent V
CCINT
supply current
XC7A12T
XC7A15T
XC7A25T
XC7A35T
XC7A50T
XC7A75T
XC7A100T
XC7A200T
XA7A12T
XA7A15T
XA7A25T
XA7A35T
XA7A50T
XA7A75T
XA7A100T
XQ7A50T
XQ7A100T
XQ7A200T
I
CCOQ
Quiescent V
CCO
supply current
XC7A12T
XC7A15T
XC7A25T
XC7A35T
XC7A50T
XC7A75T
XC7A100T
XC7A200T
XA7A12T
XA7A15T
XA7A25T
XA7A35T
XA7A50T
XA7A75T
XA7A100T
XQ7A50T
XQ7A100T
XQ7A200T
48
95
48
95
95
155
155
328
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
1
1
1
1
4
4
5
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.0V
-2
48
95
48
95
95
155
155
328
48
95
48
95
95
155
155
95
155
328
1
1
1
1
1
4
4
5
1
1
1
1
1
4
4
1
4
5
0.95V
-2LE
48
95
48
95
95
155
155
328
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
1
1
1
1
4
4
5
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0.9V
-2LE
38
66
38
66
66
108
108
232
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
1
1
1
1
4
4
5
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Units
-1
48
95
48
95
95
155
155
328
48
95
48
95
95
155
155
95
155
328
1
1
1
1
1
4
4
5
1
1
1
1
1
4
4
1
4
5
-1LI
43
58
43
58
58
96
96
203
N/A
N/A
N/A
N/A
N/A
N/A
N/A
58
96
203
1
1
1
1
1
4
4
5
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
4
5
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
DS181 (v1.25) June 18, 2018
Product Specification
www.xilinx.com
Send Feedback
5
京公网安备 11010802033920号
EEWORLD
