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name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will
offer these products to new and existing customers with the series name, product name, and
ordering part number with the prefix “CY”.
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About Cypress
Cypress is the leader in advanced embedded system solutions for the world's most innovative
automotive, industrial, smart home appliances, consumer electronics and medical products.
Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable,
high-performance memories help engineers design differentiated products and get them to market
first. Cypress is committed to providing customers with the best support and development
resources on the planet enabling them to disrupt markets by creating new product categories in
record time. To learn more, go to
www.cypress.com.
MB96330 Series
F
2
MC-16FX 16-bit Proprietary
Microcontroller
MB96330 series is based on Cypress advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The
CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new
16FX products. 16FX improvements compared to the previous generation include significantly improved performance - even at the
same operation frequency, reduced power consumption and faster start-up time.
For highest processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 48MHz
operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 20.8ns going together with
excellent EMI behavior. An on-chip clock modulation circuit significantly reduces emission peaks in the frequency spectrum. The
emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows to select
suitable operation frequencies for peripheral resources independent of the CPU speed.
Note: MB96F336 and MB96F338 devices are under development and specification is preliminary. These products under development
may change its specification without notice.
Features
Technology
■
On-chip voltage regulator
■
0.18m CMOS
CPU
■
■
■
Internal voltage regulator supports reduced internal MCU
voltage, offering low EMI and low power consumption figures
F
2
MC-16FX CPU
Up to 48 MHz internal, 20.8 ns instruction cycle time
Optimized instruction set for controller applications (bit, byte,
word and long-word data types; 23 different addressing modes;
barrel shift; variety of pointers)
8-byte instruction execution queue
Signed multiply (16-bit × 16-bit) and divide (32-bit/16-bit)
instructions available
Low voltage reset
■
Reset is generated when supply voltage is below minimum.
Code Security
■
Protects ROM content from unintended read-out
■
■
Memory Patch Function
■
■
Replaces ROM content
Can also be used to implement embedded debug support
System clock
■
■
DMA
■
On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop)
3 MHz - 16 MHz external crystal oscillator clock (maximum
frequency when using ceramic resonator depends on
Q-factor).
Up to 48 MHz external clock
32-100 kHz subsystem quartz clock
100kHz/2MHz internal RC clock for quick and safe startup,
oscillator stop detection, watchdog
Clock source selectable from main- and subclock oscillator
(part number suffix “W”) and on-chip RC oscillator,
independently for CPU and 2 clock domains of peripherals.
Low Power Consumption - 13 operating modes : (different Run,
Sleep, Timer modes, Stop mode)
Clock modulator
Automatic transfer function independent of CPU, can be
assigned freely to resources
Interrupts
■
■
■
■
■
■
■
Fast Interrupt processing
8 programmable priority levels
Non-Maskable Interrupt (NMI)
Timers
■
■
Three independent clock timers (23-bit RC clock timer, 23-bit
Main clock timer, 17-bit Sub clock timer)
Watchdog Timer
■
■
Cypress Semiconductor Corporation
Document Number: 002-04586 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised May 13, 2016
MB96330 Series
CAN
■
■
■
■
■
■
■
■
■
Input Capture Units
■
■
■
Supports CAN protocol version 2.0 part A and B
ISO16845 certified
Bit rates up to 1 Mbit/s
32 message objects
Each message object has its own identifier mask
Programmable FIFO mode (concatenation of message
objects)
Maskable interrupt
Disabled Automatic Retransmission mode for Time Triggered
CAN applications
Programmable loop-back mode for self-test operation
16-bit wide
Signals an interrupt upon external event
Rising edge, falling edge or rising & falling edge sensitive
Output Compare Units
■
■
■
16-bit wide
Signals an interrupt when a match with 16-bit I/O Timer occurs
A pair of compare registers can be used to generate an output
signal.
Programmable Pulse Generator
■
■
■
■
■
16-bit down counter, cycle and duty setting registers
Interrupt at trigger, counter borrow and/or duty match
PWM operation and one-shot operation
Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock
as counter clock and Reload timer overflow as clock input
Can be triggered by software or reload timer
USART
■
■
■
■
Full duplex USARTs (SCI/LIN)
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different
synchronous serial protocols
LIN functionality working either as master or slave LIN device
Real Time Clock
■
■
■
■
■
I
2
C
■
■
Can be clocked either from sub oscillator (devices with part
number suffix “W”), main oscillator or from the RC oscillator
Facility to correct oscillation deviation of Sub clock or RC oscil-
lator clock (clock calibration)
Read/write accessible second/minute/hour registers
Can signal interrupts every half
second/second/minute/hour/day
Internal clock divider and prescaler provide exact 1s clock
Up to 400 kbps
Master and Slave functionality, 8-bit and 10-bit addressing
A/D converter
■
■
■
SAR-type
10-bit resolution
Signals interrupt on conversion end, single conversion mode,
continuous conversion mode, stop conversion mode, activation
by software, external trigger or reload timer
External Interrupts
■
■
■
■
Edge sensitive or level sensitive
Interrupt mask and pending bit per channel
Each available CAN channel RX has an external interrupt for
wake-up
Selected USART channels SIN have an external interrupt for
wake-up
Reload Timers
■
■
■
16-bit wide
Prescaler with 1/2
1
, 1/2
2
, 1/2
3
, 1/2
4
, 1/2
5
, 1/2
6
of peripheral
clock frequency
Event count function
Free Running Timers
■
Non Maskable Interrupt
■
■
■
■
Signals an interrupt on overflow, supports timer clear upon
match with Output Compare (0, 4), Prescaler with 1, 1/2
1
, 1/2
2
,
1/2
3
, 1/2
4
, 1/2
5
, 1/2
6
, 1/2
7
,1/2
8
of peripheral clock frequency
Disabled after reset
Once enabled, can not be disabled other than by reset.
Level high or level low sensitive
Pin shared with external interrupt 0.
Document Number: 002-04586 Rev. *A
Page 2 of 122
MB96330 Series
External bus interface
■
■
■
■
■
■
■
■
Package
■
8-bit or 16-bit bidirectional data
Up to 24-bit addresses
6 chip select signals
Multiplexed address/data lines
Non-multiplexed address/data lines
Wait state request
External bus master possible
Timing programmable
144-pin plastic LQFP M08
Flash Memory
■
■
■
■
■
■
■
■
■
Supports automatic programming, Embedded Algorithm
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Number of erase cycles: 10,000 times
Data retention time: 20 years
Erase can be performed on each sector individually
Sector protection
Flash Security feature to protect the content of the Flash
Low voltage detection during Flash erase
Alarm comparator
■
■
■
Monitors an external voltage and generates an interrupt in case
of a voltage lower or higher than the defined thresholds
Threshold voltages defined externally or generated internally
Status is readable, interrupts can be masked separately
USB
■
■
■
I/O Ports
■
■
■
■
■
■
■
USB function (corresponds to USB Full Speed)
USB Mini-HOST function
Supports up to 6 endpoints
Virtually all external pins can be used as general purpose I/O
All push-pull outputs (except when used as I2C SDA/SCL line)
Bit-wise programmable as input/output or peripheral signal
Bit-wise programmable input enable
Bit-wise programmable input levels: Automotive /
CMOS-Schmitt trigger / TTL
Bit-wise programmable pull-up resistor
Bit-wise programmable output driving strength for EMI
optimization
Document Number: 002-04586 Rev. *A
Page 3 of 122
MB96330 Series
Contents
Product Lineup ................................................................. 5
Block Diagram ................................................................. 7
Pin Assignments .............................................................. 9
Pin Function Description ............................................... 11
Pin Circuit Type .............................................................. 14
I/O Circuit Type ............................................................... 15
Memory Map .................................................................... 19
RAMSTART/END and External Bus End Addresses ... 20
User ROM Memory Map For Flash Devices ................ 21
Serial Programming Communication Interface ........... 22
I/O Map ............................................................................. 23
Interrupt Vector Table .................................................... 63
Handling Devices ............................................................ 68
Latch-up prevention ................................................... 68
Unused pins handling ................................................ 68
External clock usage ................................................. 68
Unused sub clock signal ............................................ 69
Notes on PLL clock mode operation ......................... 69
Power supply pins (VCC/VSS) .................................. 69
Crystal oscillator and ceramic resonator circuit ......... 69
Turn on sequence of power supply to
A/D converter and analog inputs ............................... 69
Pin handling when not using the A/D converter ........ 69
Notes on Power-on .................................................... 69
Stabilization of power supply voltage ........................ 70
Serial communication ................................................ 70
Electrical Characteristics ............................................... 71
Absolute Maximum Ratings ....................................... 71
Recommended Operating Conditions ....................... 74
DC characteristics ..................................................... 75
AC Characteristics ..................................................... 82
USB Characteristics ................................................ 103
Analog Digital Converter ......................................... 106
Alarm Comparator ................................................... 110
Low Voltage Detector characteristics ...................... 112
FLASH memory program/erase characteristics ...... 114
Example Characteristics .............................................. 115
Package Dimension MB96(F)33x LQFP 144P ............ 116
Ordering Information .................................................... 117
Revision History ........................................................... 118
Major Changes .............................................................. 120
Document History ......................................................... 121
Document Number: 002-04586 Rev. *A
Page 4 of 122
Analogue and Mixed Signal
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