SAM E70/S70/V70/V71 Family
32-bit ARM Cortex-M7 MCUs with FPU, Audio and
Graphics Interfaces, High-Speed USB, Ethernet, and
Advanced Analog
Features
Core
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ARM Cortex -M7 running at up to 300 MHz
16 Kbytes of I-Cache and 16 Kbytes of D-Cache with Error Code Correction (ECC)
Single-precision and double-precision HW Floating Point Unit (FPU)
Memory Protection Unit (MPU) with 16 zones
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DSP Instructions, Thumb -2 Instruction Set
Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit
(TPIU)
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Memories
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Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
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Up to 384 Kbytes embedded Multi-port SRAM
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Tightly Coupled Memory (TCM)
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16 Kbytes ROM with embedded Bootloader routines (UART0, USB) and IAP routines
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16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and
NAND Flash with on-the-fly scrambling
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16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
System
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Embedded voltage regulator for single-supply operation
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Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
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Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz
or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
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RTC with Gregorian calendar mode, waveform generation in low-power modes
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RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
32-bit low-power Real-time Timer (RTT)
High-precision Main RC oscillator with 12 MHz default frequency.
32.768 kHz crystal oscillator or Slow RC oscillator as source of low-power mode device clock
(SLCK)
One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
Temperature Sensor
One dual-port 24-channel central DMA Controller (XDMAC)
©
2018 Microchip Technology Inc.
Datasheet
DS60001527B-page 1
SAM E70/S70/V70/V71 Family
Low-Power Features
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Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 μA in Backup
mode with RTC, RTT and wakeup logic enabled
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Ultra low-power RTC and RTT
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1 Kbyte of backup RAM (BRAM) with dedicated regulator
Peripherals
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One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP
frames and 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Timestamping
and IEEE802.1Qav credit-based traffic-shaping hardware support.
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USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional
endpoints, dedicated DMA
12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
Two master Controller Area Networks (MCAN) with Flexible Data Rate (CAN-FD) with SRAM-based
mailboxes, time- and event-triggered transmission
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MediaLB device with 3-wire mode, up to 1024 x Fs speed, supporting MOST25 and MOST50
networks
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Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA , RS-485, SPI, Manchester and
Modem modes; USART1 supports LON mode.
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Five 2-wire UARTs with SleepWalking support
Three Two-Wire Interfaces (TWIHS) (I
2
C-compatible) with SleepWalking support
Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place
and on-the-fly scrambling
Two Serial Peripheral Interfaces (SPI)
One Serial Synchronous Controller (SSC) with I
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S and TDM support
Two Inter-IC Sound Controllers (I2SC)
One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes,
constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs
per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and
lighting control.
Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input
mode and programmable gain stage, allowing dual sample-and-hold at up to 1.7 Msps. Offset and gain
error correction feature.
One 2-channel 12-bit 1 Msps-per-channel Digital-to-Analog Controller (DAC) with Differential and Over
Sampling modes
One Analog Comparator Controller (ACC) with flexible input selection, selectable input hysteresis
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Cryptography
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True Random Number Generator (TRNG)
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AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications
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Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
I/O
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Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch
filtering and On-die Series Resistor Termination
Five Parallel Input/Output Controllers (PIO)
©
2018 Microchip Technology Inc.
Datasheet
DS60001527B-page 2
SAM E70/S70/V70/V71 Family
Voltage
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Single supply voltage from 3.0V to 3.6V for Qualification AEC - Q100 Grade 2 Devices
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Single Supply voltage from 1.7V to 3.6V for Industrial Temperature Devices
Packages
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LQFP144, 144-lead LQFP, 20x20 mm, pitch 0.5 mm
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LFBGA144, 144-ball LFBGA, 10x10 mm, pitch 0.8 mm
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TFBGA144, 144-ball TFBGA, 10x10mm, pitch 0.8 mm
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UFBGA144, 144-ball UFBGA, 6x6 mm, pitch 0.4 mm
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LQFP100, 100-lead LQFP, 14x14 mm, pitch 0.5 mm
TFBGA100, 100-ball TFBGA, 9x9 mm, pitch 0.8 mm
VFBGA100, 100-ball VFBGA, 7x7 mm, pitch 0.65 mm
LQFP64, 64-lead LQFP, 10x10 mm, pitch 0.5 mm
QFN64, 64-pad QFN 9x9 mm, pitch 0.5 mm, with wettable flanks
©
2018 Microchip Technology Inc.
Datasheet
DS60001527B-page 3
SAM E70/S70/V70/V71 Family
Table of Contents
Features.......................................................................................................................... 1
1. Configuration Summary...........................................................................................15
2. Ordering Information................................................................................................17
3. Block Diagram......................................................................................................... 18
4. Signal Description....................................................................................................22
5. Automotive Quality Grade....................................................................................... 31
6. Package and Pinout................................................................................................ 32
6.1.
6.2.
6.3.
6.4.
6.5.
6.6.
144-lead Packages.....................................................................................................................32
144-lead Package Pinout........................................................................................................... 33
100-lead Packages.....................................................................................................................39
100-lead Package Pinout........................................................................................................... 40
64-lead Package........................................................................................................................ 44
64-lead Package Pinout............................................................................................................. 44
7. Power Considerations............................................................................................. 48
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
Power Supplies.......................................................................................................................... 48
Power Constraints...................................................................................................................... 48
Voltage Regulator.......................................................................................................................49
Backup SRAM Power Switch..................................................................................................... 50
Active Mode................................................................................................................................50
Low-power Modes...................................................................................................................... 50
Wakeup Sources........................................................................................................................ 52
Fast Startup................................................................................................................................53
8. Input/Output Lines................................................................................................... 54
8.1.
8.2.
8.3.
8.4.
General-Purpose I/O Lines.........................................................................................................54
System I/O Lines........................................................................................................................ 54
NRST Pin................................................................................................................................... 56
ERASE Pin................................................................................................................................. 56
9. Interconnect.............................................................................................................57
10. Product Mapping..................................................................................................... 58
11. Memories.................................................................................................................59
11.1. Embedded Memories................................................................................................................. 59
11.2. External Memories..................................................................................................................... 65
12. Event System.......................................................................................................... 66
©
2018 Microchip Technology Inc.
Datasheet
DS60001527B-page 4
SAM E70/S70/V70/V71 Family
12.1. Embedded Characteristics......................................................................................................... 66
12.2. Real-time Event Mapping........................................................................................................... 66
13. System Controller.................................................................................................... 70
13.1. System Controller and Peripherals Mapping..............................................................................70
13.2. Power-on-Reset, Brownout and Supply Monitor........................................................................ 70
13.3. Reset Controller......................................................................................................................... 70
14. Peripherals.............................................................................................................. 72
14.1. Peripheral Identifiers.................................................................................................................. 72
14.2. Peripheral Signal Multiplexing on I/O Lines................................................................................75
15. ARM Cortex-M7 (ARM)........................................................................................... 76
15.1. ARM Cortex-M7 Configuration................................................................................................... 76
16. Debug and Test Features........................................................................................ 77
16.1.
16.2.
16.3.
16.4.
16.5.
16.6.
16.7.
Description................................................................................................................................. 77
Embedded Characteristics......................................................................................................... 77
Associated Documents...............................................................................................................77
Debug and Test Block Diagram..................................................................................................78
Debug and Test Pin Description................................................................................................. 78
Application Examples................................................................................................................. 79
Functional Description................................................................................................................80
17. SAM-BA Boot Program............................................................................................85
17.1.
17.2.
17.3.
17.4.
17.5.
17.6.
Description................................................................................................................................. 85
Embedded Characteristics......................................................................................................... 85
Hardware and Software Constraints.......................................................................................... 85
Flow Diagram............................................................................................................................. 85
Device Initialization.....................................................................................................................86
SAM-BA Monitor.........................................................................................................................86
18. Fast Flash Programming Interface (FFPI)............................................................... 91
18.1. Description................................................................................................................................. 91
18.2. Embedded Characteristics......................................................................................................... 91
18.3. Parallel Fast Flash Programming............................................................................................... 91
19. Bus Matrix (MATRIX).............................................................................................100
19.1.
19.2.
19.3.
19.4.
Description............................................................................................................................... 100
Embedded Characteristics....................................................................................................... 100
Functional Description..............................................................................................................102
Register Summary....................................................................................................................108
20. USB Transmitter Macrocell Interface (UTMI).........................................................132
20.1. Description............................................................................................................................... 132
20.2. Embedded Characteristics....................................................................................................... 132
20.3. Register Summary....................................................................................................................133
©
2018 Microchip Technology Inc.
Datasheet
DS60001527B-page 5
FPGA/CPLD
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