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ATSAM3S4BA-MUR

Description
IC MCU 32BIT 256KB FLASH 64QFN
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size2MB,64 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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ATSAM3S4BA-MUR Overview

IC MCU 32BIT 256KB FLASH 64QFN

ATSAM3S4BA-MUR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
MakerMicrochip
package instructionHVQCCN,
Reach Compliance Codecompliant
Factory Lead Time19 weeks
Has ADCYES
Address bus width
bit size32
maximum clock frequency20 MHz
DAC channelYES
DMA channelYES
External data bus width
JESD-30 codeS-XQCC-N64
length9 mm
Number of I/O lines47
Number of terminals64
On-chip program ROM width8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
ROM programmabilityFLASH
Filter levelTS 16949
Maximum seat height1 mm
speed64 MHz
Maximum supply voltage1.95 V
Minimum supply voltage1.62 V
Nominal supply voltage1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
width9 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
Features
Core
– ARM
®
Cortex
®
-M3 revision 2.0 running at up to 64 MHz
– Memory Protection Unit (MPU)
– Thumb
®
-2 instruction set
Pin-to-pin compatible with AT91SAM7S legacy products (48- and 64-pin versions)
Memories
– From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,
single plane
– From 16 to 48 Kbytes embedded SRAM
– 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines
– 8-bit Static Memory Controller (SMC): SRAM, PSRAM, NOR and NAND Flash
support
– Memory Protection Unit (MPU)
System
– Embedded voltage regulator for single supply operation
– Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe
operation
– Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure
Detection and optional low power 32.768 kHz for RTC or device clock
– High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default
frequency for device startup. In-application trimming access for frequency
adjustment
– Slow Clock Internal RC oscillator as permanent low-power mode device clock
– Two PLLs up to 130 MHz for device clock and for USB
– Temperature Sensor
– Up to 22 peripheral DMA (PDC) channels
Low Power Modes
– Sleep and Backup modes, down to 3 µA in Backup mode
– Ultra low power RTC
Peripherals
– USB 2.0 Device: 12 Mbps, 2668 byte FIFO, up to 8 bidirectional Endpoints. On-Chip
Transceiver
– Up to 2 USARTs with ISO7816, IrDA
®
, RS-485, SPI, Manchester and Modem Mode
– Two 2-wire UARTs
– Up to 2 Two Wire Interface (I2C compatible), 1 SPI, 1 Serial Synchronous Controller
(I2S), 1 High Speed Multimedia Card Interface (SDIO/SD Card/MMC)
– Up to 6 Three-Channel 16-bit Timer/Counter with capture, waveform, compare and
PWM mode. Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for
Stepper Motor
– 4-channel 16-bit PWM with Complementary Output, Fault Input, 12-bit Dead Time
Generator Counter for Motor Control
– 32-bit Real-time Timer and RTC with calendar and alarm features
– Up to 15-channel, 1Msps ADC with differential input mode and programmable gain
stage
– One 2-channel 12-bit 1Msps DAC
– One Analog Comparator with flexible input selection, Selectable input hysteresis
– 32-bit Cyclic Redundancy Check Calculation Unit (CRCCU)
I/O
– Up to 79 I/O lines with external interrupt capability (edge or level sensitivity),
debouncing, glitch filtering and on-die Series Resistor Termination
– Three 32-bit Parallel Input/Output Controllers, Peripheral DMA assisted Parallel
Capture Mode
Packages
– 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm/100-ball LFBGA, 9 x 9 mm, pitch 0.8 mm
– 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm/64-pad QFN 9x9 mm, pitch 0.5 mm
– 48-lead LQFP, 7 x 7 mm, pitch 0.5 mm/48-pad QFN 7x7 mm, pitch 0.5 mm
AT91SAM
ARM-based
Flash MCU
SAM3S Series
Summary
NOTE:
This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
6500CS–ATARM–24-Jan-11

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