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SY100EL35ZI

Description
IC FF D-TYPE SNGL 1BIT 8SOIC
Categorylogic    logic   
File Size77KB,4 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric View All

SY100EL35ZI Overview

IC FF D-TYPE SNGL 1BIT 8SOIC

SY100EL35ZI Parametric

Parameter NameAttribute value
MakerMicrochip
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codecompliant
series100EL
JESD-30 codeR-PDSO-G8
length4.93 mm
Logic integrated circuit typeJ-K FLIP-FLOP
Number of digits2
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
propagation delay (tpd)0.7 ns
Maximum seat height1.73 mm
surface mountYES
technologyECL
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width3.94 mm
minfmax1800 MHz
NOT RECOMMENDED FOR NEW DESIGNS
Micrel, Inc.
JK FLIP-FLOP
SY10EL35
SY100EL35
SY10EL35
SY100EL35
FEATURES
s
s
s
s
s
525ps propagation delay
2.2GHz toggle frequency
High bandwidth output transistions
Internal 75K
input pull-down resistors
Available in 8-pin SOIC package
DESCRIPTION
The SY10/100EL35 are high-speed JK Flip-Flops. The
J/K data enters the master portion of the flip-flop when
the clock is LOW and is transferred to the slave and,
thus, the outputs, upon a positive transition of the clock.
The reset pin is asynchronous and is activated with a
logic HIGH.
TRUTH TABLE
(1)
J
L
L
H
H
X
K
L
H
L
H
X
R
L
L
L
L
H
CLK
Z
Z
Z
Z
X
Qn+1
Qn
L
H
Qn
L
NOTE:
1. Z = LOW-to-HIGH transition.
M9999-121205
hbwhelp@micrel.com or (408) 955-1690
Rev.: G
Amendment: /0
1
1
Issue Date: December 2005

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