Source or Sink Current on (IN, /IN) .................... ±50mA
VREF-AC Current
Source or Sink Current on (I
VT
) ............................. ±2mA
Lead Temperature (soldering, 20s) ............................ 260°C
Storage Temperature (Ts)......................... –65°C to +150°C
Operating Ratings
(6)
Supply Voltage Range .........................
+2.375V to +2.625V
............................................................... +3.0V to +3.6V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
(7)
Package Thermal Resistance
(θ
JA
) Still Air........................................................ 60°C/W
(θ
JA
) Junction to Board ....................................... 32°C/W
DC Electrical Characteristics
(8)
T
A
= –40°C to +85°C, unless otherwise noted.
Symbol
V
CC
I
CC
R
IN
R
DIFF-IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
REF–AC
Parameter
Power Supply
Power Supply Current
Input Resistance (IN-to-VT)
Differential Input Resistance
(IN-to-/IN)
Input HIGH Voltage (IN, /IN)
Input LOW Voltage (IN, /IN)
Input Voltage Swing (IN, /IN)
Differential Input Voltage Swing
|IN – /IN|
Output Reference Voltage
See
Figure 1.
See
Figure 2.
No load, max. V
CC
45
90
1.2
0
0.1
0.2
V
CC
– 1.525
V
CC
– 1.425
V
CC
– 1.325
Condition
Min.
2.375
3.0
47
50
100
Typ.
Max.
2.625
3.6
70
55
110
V
CC
V
IH
– 0.1
1.7
Units
V
mA
Ω
Ω
V
V
V
V
V
LVTTL/LVCMOS Input DC Electrical Characteristics
V
CC
= 2.375V to 3.60V; V
EE
= 0V; T
A
= –40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Notes:
5. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this datasheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
6. The datasheet limits are not guaranteed if the device is operated beyond the operating ratings.
7. Package thermal resistance assumes the exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. Ψ
JB
and θ
JA
values are determined for a 4-layer board at the still-air package thermal resistance, unless otherwise stated.
8. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min.
2.0
0
–125
–300
Typ.
Max.
V
CC
0.8
20
Units
V
V
µA
µA
January 17, 2014
4
Revision 7.0
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89831U
LVPECL Output DC Electrical Characteristics
(8)
V
CC
= 2.5V ±5% or 3.3V ±10%; R
L
= 50Ω to V
CC
−
2V; T
A
= –40°C to + 85°C, unless otherwise noted.
Symbol
V
OH
V
OL
V
OUT
V
DIFF_OUT
Parameter
Output HIGH Voltage (Q, /Q)
Output LOW Voltage (Q, /Q)
Output Voltage Swing (Q, /Q)
Differential Output Voltage
Swing (Q, /Q)
See
Figure 1.
See
Figure 2.
Condition
Min.
V
CC
– 1.145
V
CC
– 1.945
550
1100
800
1600
Typ.
Max.
V
CC
– 0.895
V
CC
– 1.695
Units
V
V
mV
mV
LVTTL/LVCMOS DC Electrical Characteristics
(8)
V
CC
= 2.5V ±5% or 3.3V ±10%; T
A
= –40°C to + 85°C, unless otherwise noted.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min.
2.0
0
–125
–300
Typ.
Max.
V
CC
0.8
30
Units
V
V
µA
µA
AC Electrical Characteristics
(9)
V
CC
= 2.5V ±5% or 3.3V ±10%; R
L
= 50Ω to V
CC
−
2V; T
A
= –40°C to + 85°C, unless otherwise noted.
Symbol
f
MAX
t
pd
Parameter
Maximum Frequency
Propagation
Delay
IN-to-Q
IN-to-Q
Condition
V
OUT
≥ 450mV
V
IN
≥ 100mV
V
IN
≥ 800mV
Note 10
Note 11
Note 12
Note 12
Output = 622MHz
Integration Range 12kHz–20MHz
At full output swing
Freq. < 630MHz
70
48
300
300
62
150
50
225
52
250
Min.
2.0
Typ.
2.5
390
350
5
450
20
150
Max.
Units
GHz
ps
ps
ps
ps
ps
ps
fs
ps
%
t
SKEW
Within-Device Skew
Part-to-Part Skew
t
S
t
H
t
JITTER
t
r
, t
f
Set-Up Time
Hold Time
EN to IN, /IN
EN to IN, /IN
RMS Phase Jitter
Output Rise/Fall Times
(20% to 80%)
Duty Cycle
Notes:
9. High-frequency AC parameters are guaranteed by design and characterization.
10. Within-device skew is measured between two different outputs under identical input transitions.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
12. Set-up and hold times apply to synchronous applications that will enable/disable before the next clock cycle. For asynchronous applications, set-up
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