CLC2011, CLC4011
Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
General Description
The CLC2011 (dual) and CLC4011 (quad) are ultra-low cost, low power,
voltage feedback amplifiers. At 2.7V, the CLCx011 family uses only 136μA
of supply current per amplifier and are designed to operate from a supply
range of 2.5V to 5.5V (±1.25 to ±2.75). The input voltage range exceeds the
negative and positive rails.
The CLCx011 family of amplifiers offer high bipolar performance at a low
CMOS prices. They offer superior dynamic performance with 4.9MHz small
signal bandwidths and 5.3V/μs slew rates. The combination of low power,
high bandwidth, and rail-to-rail performance make the CLCx011 amplifiers
well suited for battery-powered communication/computing systems.
FE ATUR ES
■■
136μA supply current
■■
4.9MHz bandwidth
■■
Output swings to within 20mV of either rail
■■
Input voltage range exceeds the rail by
>250mV
■■
5.3V/μs slew rate
■■
21nV/√Hz input voltage noise
■■
±35mA linear output current
■■
Fully specified at 2.7V and 5V supplies
AP PLICATIONS
■■
Portable/battery-powered applications
■■
Mobile communications, cell phones,
pagers
■■
ADC buffer
■■
Active filters
■■
Portable test instruments
■■
Notebooks and PDA’s
■■
Signal conditioning
■■
Medical equipment
■■
Portable medical instrumentation
Ordering Information -
back page
Large Signal Frequency Response
V
s
= 5V
Output Swing vs. Load
1.35
R
L
= 10kΩ
R
L
= 1kΩ
Magnitude (1dB/div)
V
o
= 1V
pp
Output Voltage (0.27V/div)
0
R
L
= 75Ω
R
L
= 100Ω
R
L
= 200Ω
R
L
= 75/100Ω
V
o
= 4V
pp
V
o
= 2V
pp
-1.35
0.01
0.1
1
10
-2.0
0
2.0
Frequency (MHz)
Input Voltage (0.4V/div)
© 2009 - 2014 Exar Corporation
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Rev 1D
CLC2011, CLC4011
Absolute Maximum Ratings
Stresses beyond the limits listed below may cause
permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect
device reliability and lifetime.
V
S
..................................................................................... 0V to 6V
V
IN
............................................................ -V
S
- 0.5V to +V
S
+0.5V
Continuous Output Current ..................................-40mA to +40mA
Operating Conditions
Supply Voltage Range ...................................................2.5 to 5.5V
Operating Temperature Range ...............................-40°C to 125°C
Junction Temperature ........................................................... 150°C
Storage Temperature Range...................................-65°C to 150°C
Lead Temperature (Soldering, 10s) ......................................260°C
Package Thermal Resistance
θ
JA
(SOIC-8) .....................................................................150°C/W
θ
JA
(MSOP-8) .................................................................. 200°C/W
θ
JA
(SOIC-14) .................................................................... 90°C/W
θ
JA
(TSSOP-14) ................................................................100°C/W
Package thermal resistance (θ
JA
), JEDEC standard, multi-layer
test boards, still air.
ESD Protection
CLC2011, CLC4011 (HBM) .......................................................2kV
ESD Rating for HBM (Human Body Model).
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Rev 1D
CLC2011, CLC4011
Electrical Characteristics at +2.7V
T
A
= 25°C, V
S
= +2.7V, R
f
= R
g
= 5kΩ, R
L
= 10kΩ to V
S
/2; G = 2; unless otherwise noted.
Symbol
UGBW
SS
BW
SS
BW
LS
GBWP
t
R
, t
F
t
S
OS
SR
HD2
HD3
THD
e
n
X
TALK
Parameter
Unity Gain -3dB Bandwidth
-3dB Bandwidth
Large Signal Bandwidth
Gain Bandwidth Product
Rise and Fall Time
Settling Time to 0.1%
Overshoot
Slew Rate
2nd Harmonic Distortion
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
Conditions
G = +1, V
OUT
= 0.02V
pp
G = +2, V
OUT
= 0.2V
pp
G = +2, V
OUT
= 2V
pp
G = +11, V
OUT
= 0.2V
pp
V
OUT
= 1V step; (10% to 90%)
V
OUT
= 1V step
V
OUT
= 1V step
1V step
10kHz, V
OUT
= 1V
pp
10kHz, V
OUT
= 1V
pp
10kHz, V
OUT
= 1V
pp
>10kHz
Channel to Channel, V
OUT
= 2V
pp
, f = 10kHz
Channel to Channel, V
OUT
= 2V
pp
, f = 50kHz
Min
Typ
4.9
3.2
1.4
2.5
163
500
<1
5.3
-72
-72
0.03
21
82
74
0.5
5
90
32
Max
Units
MHz
MHz
MHz
MHz
ns
ns
%
V/μs
dBc
dBc
%
nV/√Hz
dB
dB
mV
μV/°C
nA
pA/°C
dB
dB
μA
MΩ
pF
V
dB
Frequency Domain Response
Time Domain Response
Distortion/Noise Response
DC Performance
V
IO
d
VIO
I
B
dI
B
PSRR
A
OL
I
S
R
IN
C
IN
CMIR
CMRR
Input Offset Voltage
Average Drift
Input Bias Current
Average Drift
Power Supply Rejection Ratio
Open Loop Gain
Supply Current
Input Resistance
Input Capacitance
Common Mode Input Range
Common Mode Rejection Ratio
DC
DC
V
OUT
= V
S
/ 2
per channel
Non-inverting
55
83
90
136
12
2
-0.25 to
2.95
81
0.02 to
2.68
0.05 to
2.63
0.11 to
2.52
±30
Input Characteristics
Output Characteristics
R
L
= 10kΩ to V
S
/ 2
V
OUT
Output Voltage Swing
R
L
= 1kΩ to V
S
/ 2
R
L
= 200Ω to V
S
/ 2
I
OUT
Output Current
V
V
V
mA
© 2009 - 2014 Exar Corporation
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Electrical Characteristics at +5V
T
A
= 25°C, V
S
= +5V, R
f
= R
g
= 5kΩ, R
L
= 10kΩ to V
S
/2; G = 2; unless otherwise noted.
Symbol
UGBW
SS
BW
SS
BW
LS
GBWP
t
R
, t
F
t
S
OS
SR
HD2
HD3
THD
e
n
X
TALK
Parameter
Unity Gain -3dB Bandwidth
-3dB Bandwidth
Large Signal Bandwidth
Gain Bandwidth Product
Rise and Fall Time
Settling Time to 0.1%
Overshoot
Slew Rate
2nd Harmonic Distortion
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
Conditions
G = +1, V
OUT
= 0.02V
pp
G = +2, V
OUT
= 0.2V
pp
G = +2, V
OUT
= 2V
pp
G = +11, V
OUT
= 0.2V
pp
V
OUT
= 1V step; (10% to 90%)
V
OUT
= 2V step
V
OUT
= 1V step
2V step
10kHz, V
OUT
= 1V
pp
10kHz, V
OUT
= 1V
pp
10kHz, V
OUT
= 1V
pp
>10kHz
Channel to Channel, V
OUT
= 2V
pp
, f = 10kHz
Channel to Channel, V
OUT
= 2V
pp
, f = 50kHz
Min
Typ
4.3
3.0
2.3
2.5
110
470
<1
9
-73
-75
0.03
22
82
74
Max
Units
MHz
MHz
MHz
MHz
ns
ns
%
V/μs
dBc
dBc
%
nV/√Hz
dB
dB
Frequency Domain Response
Time Domain Response
Distortion/Noise Response
DC Performance
V
IO
d
VIO
I
B
dI
B
PSRR
A
OL
I
S
R
IN
C
IN
CMIR
CMRR
Input Offset Voltage
Average Drift
Input Bias Current
Average Drift
Power Supply Rejection Ratio
Open Loop Gain
Supply Current
Input Resistance
Input Capacitance
Common Mode Input Range
Common Mode Rejection Ratio
DC
58
0.08 to
4.92
DC
V
OUT
= V
S
/ 2
per channel
Non-inverting
55
-8
1.5
15
90
40
85
80
160
12
2
-0.25 to
5.25
80
0.04 to
4.96
0.07 to
4.9
0.14 to
4.67
±35
235
450
8
mV
μV/°C
nA
pA/°C
dB
dB
μA
MΩ
pF
V
dB
Input Characteristics
Output Characteristics
R
L
= 10kΩ to V
S
/ 2
V
OUT
Output Voltage Swing
R
L
= 1kΩ to V
S
/ 2
R
L
= 200Ω to V
S
/ 2
I
OUT
Output Current
V
V
V
mA
© 2009 - 2014 Exar Corporation
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
CLC2011 Pin Configurations
SOIC-8 / MSOP-8
CLC2011 Pin Assignments
SOIC-8 / MSOP-8
Pin No.
1
Pin Name
OUT1
-IN1
+IN1
-V
S
+IN2
-IN2
OUT2
+V
S
Description
Output, channel 1
Negative input, channel 1
Positive input, channel 1
Negative supply
Positive input, channel 2
Negative input, channel 2
Output, channel 2
Positive supply
OUT1
-IN1
+IN1
-V
s
1
2
3
4
-
+
8
7
-
+
+V
s
OUT2
-IN2
+IN2
2
3
4
5
6
7
8
6
5
CLC4011 Pin Configuration
SOIC-14 / TSSOP-14
CLC4011 Pin Assignments
SOIC-14 / TSSOP-14
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Name
OUT1
-IN1
+IN1
+V
S
+IN2
-IN2
OUT2
OUT3
-IN3
+IN3
-V
S
+IN4
-IN4
OUT4
Description
Output, channel 1
Negative input, channel 1
Positive input, channel 1
Positive supply
Positive input, channel 2
Negative input, channel 2
Output, channel 2
Output, channel 3
Negative input, channel 3
Positive input, channel 3
Negative supply
Positive input, channel 4
Negative input, channel 4
Output, channel 4
OUT1
-IN1
+IN1
+V
S
+IN2
-IN2
OUT2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT4
-IN4
+IN4
-V
S
+IN3
-IN3
OUT3
© 2009 - 2014 Exar Corporation
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exar.com/CLC2011
Rev 1D
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