MPIA4012V2-1R0-R

1. Problem When developing STM32 with IAR, I found that I could not print floating point numbers by redirecting printf to the serial port. The code is as follows:  The output is as follows:  It can...[Details]

All relevant units: In accordance with the relevant requirements of the provincial and municipal electric vehicle charging infrastructure construction work, in order to further standardize the...[Details]

The trade war between China and the United States has become the focus. The United States has begun to play the ban card against Chinese technology companies. The ZTE incident shows that if the ban...[Details]

STM32 uses FSMC to read and write CPLD programs. CPLD is hung on the address line and data line of STM32. CPLD is regarded as an off-chip RAM for reading and writing. On the board I made, CPLD is hun...[Details]

What is SYSTICK: This is a 24-bit system tick timer, SysTick, with automatic reload and overflow interrupt functions. All microcontrollers based on the Cortex_M3 processor can obtain a certain time ...[Details]

*This article is based on the author's report at the "Embedded System Association Theme Discussion (Total 22nd) - Current Situation and Development Prospects of Internet of Things Operating Systems...[Details]

In January, Android 7.0 Marshmallow surpassed Lollipop three years ago to become the second most used Android version in the world. According to the latest data from Google , a snapshot of d...[Details]

The day before yesterday, another mainland technology company submitted a prospectus to the Hong Kong Stock Exchange. The company is called "Jia Nan Creative (hereinafter referred to as 'Jia Nan')"...[Details]

When Amazon quietly launched a product called Elastic Computing Cloud 12 years ago, the Internet industry in China, across the ocean, also ushered in an unprecedented development opportunity. Let's...[Details]

Independent watchdog (IWDG) and low power mode are often used in STM32 development. The watchdog is to detect and solve faults caused by software errors, and the low power mode is to enter sleep mode...[Details]

One addend is in the on-chip RAM 40H, 41H, 42H units, the other addend is in the on-chip RAM 43H, 44H, 45H, and the sum is stored in the 50H, 51H, 52H units, with the carry bit stored in 00H. Please ...[Details]

Design a second and minute pulse generator for a single-chip microcomputer using the interrupt method. Assume that P1.0 generates a positive pulse of one machine cycle per second, and P1.1 generates ...[Details]

;Question requirements: ;Stopwatch timing, press S0 to start timing, and the digital tube will display; ;Press S0 again to stop. If S0 is not pressed to stop after counting for 1 minute, the buzzer w...[Details]

/********************************************************************** **                                                        ** File : SPI.c | TLC549 |                                     ** Ver...[Details]

　　The data provided by the International Federation of Robotics (IFR World Robotics) well demonstrates the growth momentum of industrial robots around the world. Let's follow the industrial control e...[Details]