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XC3S4000-4VQG100C

Description
FPGA, 192 CLBS, 50000 GATES, 630 MHz, PQFP100
CategoryProgrammable logic devices    Programmable logic   
File Size2MB,198 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
Environmental Compliance
Download Datasheet Parametric View All

XC3S4000-4VQG100C Overview

FPGA, 192 CLBS, 50000 GATES, 630 MHz, PQFP100

XC3S4000-4VQG100C Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerXILINX
Parts packaging codeQFP
package instructionTFQFP,
Contacts100
Reach Compliance Codecompli
JESD-30 codeS-PQFP-G100
JESD-609 codee3
length14 mm
Humidity sensitivity level3
Configurable number of logic blocks192
Equivalent number of gates50000
Number of terminals100
Maximum operating temperature85 °C
Minimum operating temperature
organize192 CLBS, 50000 GATES
Package body materialPLASTIC/EPOXY
encapsulated codeTFQFP
Package shapeSQUARE
Package formFLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)260
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage1.26 V
Minimum supply voltage1.14 V
Nominal supply voltage1.2 V
surface mountYES
Temperature levelOTHER
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
Base Number Matches1
0
R
Spartan-3 FPGA Family:
Complete Data Sheet
0
0
DS099 January 17, 2005
This document includes all four modules of the Spartan™-3 FPGA data sheet.
Module 1:
Introduction and Ordering Information
DS099-1 (v1.4) January 17, 2005
6 pages
Introduction
Features
Architectural Overview
Product Availability
User I/O Chart
Ordering Information
Module 3:
DC and Switching Characteristics
DS099-3 (v1.5) December 17, 2004
39 pages
DC Electrical Characteristics
- Absolute Maximum Ratings
- Supply Voltage Specifications
- Recommended Operating Conditions
- DC Characteristics
Switching Characteristics
- I/O Timing
- Internal Logic Timing
- DCM Timing
- Configuration and JTAG Timing
Module 2:
Functional Description
DS099-2 (v1.3) August 24, 2004
40 pages
IOBs
- IOB Overview
- SelectIO™ Signal Standards
CLB Overview
Block RAM
Dedicated Multipliers
Digital Clock Manager (DCM)
- Clock Network
Configuration
Module 4:
Pinout Descriptions
DS099-4 (v1.6) January 17, 2005
112 pages
Pin Descriptions
- Pin Behavior During Configuration
Package Overview
Pinout Tables
- Footprints
IMPORTANT NOTE:
The Spartan-3 FPGA data sheet is created and published in separate modules. This complete version
is provided for easy downloading and searching of the complete document. Page, figure, and table numbers begin at 1 for
each module, and each module has its own Revision History at the end. Use the PDF "Bookmarks" for easy navigation in
this volume.
© 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS099 January 17, 2005
www.xilinx.com
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