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R5F10WMCAFA#50

Description
IC MCU 16BIT 32KB FLASH 80LQFP
Categorysemiconductor    The embedded processor and controller   
File Size1MB,126 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
Download Datasheet Download user manual Parametric View All

R5F10WMCAFA#50 Overview

IC MCU 16BIT 32KB FLASH 80LQFP

R5F10WMCAFA#50 Parametric

Parameter NameAttribute value
core processorRL78
core size16-bit
speed24MHz
ConnectivityCSI,I²C,LINbus,UART/USART
PeripheralDMA,LCD,LVD,POR,PWM,WDT
Number of I/Os58
Program storage capacity32KB(32K x 8)
Program memory typeflash memory
EEPROM capacity4K x 8
RAM capacity1.5K x 8
Voltage - Power Supply (Vcc/Vdd)1.6 V ~ 5.5 V
data converterA/D 12x10b
Oscillator typeinternal
Operating temperature-40°C ~ 85°C(TA)
Package/casing80-LQFP
Supplier device packaging80-LQFP(14x14)
Datasheet
RL78/L13
RENESAS MCU
R01DS0168EJ0210
Rev.2.10
Aug 12, 2016
Integrated LCD controller/driver, True Low Power Platform (as low as 112.5
μA/MHz,
and 0.61
μA
for RTC + LVD),
1.6 V to 5.5 V operation, 16 to 128 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
1. OUTLINE
<R>
1.1 Features
Ultra-low power consumption technology
V
DD
= single power supply voltage of 1.6 to 5.5 V which can
operate a 1.8 V device at a low voltage
HALT mode
STOP mode
SNOOZE mode
RL78 CPU core
CISC architecture with 3-stage pipeline
Minimum instruction execution time: Can be changed from high
speed (0.04167 µs: @ 24 MHz operation with high-speed on-
chip oscillator) to ultra-low speed (30.5 µs: @ 32.768 kHz
operation with subsystem clock)
Address space: 1 MB
General-purpose registers: (8-bit register × 8) × 4 banks
On-chip RAM: 1 to 8 KB
Code flash memory
Code flash memory: 16 to 128 KB
Block size: 1 KB
Prohibition of block erase and rewriting (security function)
On-chip debug function
Self-programming (with boot swap function/flash shield window
function)
Data flash memory
Data flash memory: 4 KB
Back ground operation (BGO): Instructions can be executed
from the program memory while rewriting the data flash memory.
Number of rewrites: 1,000,000 times (TYP.)
Voltage of rewrites: V
DD
= 1.8 to 5.5 V
High-speed on-chip oscillator
Select from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz,
4 MHz, 3 MHz, 2 MHz, and 1 MHz
High accuracy: +/-1.0 % (V
DD
= 1.8 to 5.5 V, T
A
= -20 to +85°C)
Operating ambient temperature
T
A
= -40 to +85°C (A: Consumer applications)
T
A
= -40 to +105°C (G: Industrial applications)
Power management and reset function
On-chip power-on-reset (POR) circuit
On-chip voltage detector (LVD) (Select interrupt and reset from
14 levels)
DMA (Direct Memory Access) controller
4 channels
Number of clocks during transfer between 8/16-bit SFR and
internal RAM: 2 clocks
Multiplier and divider/multiply-accumulator
16 bits × 16 bits = 32 bits (Unsigned or signed)
32 bits ÷ 32 bits = 32 bits (Unsigned)
16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
Serial interface
CSI: 2 channels
UART/UART (LIN-bus supported): 3, 4 channels/1 channel
I
2
C/Simplified I
2
C communication: 1 channel/2 channels
Timer
16-bit timer: 8 channels (with remote control output function)
16-bit timer KB20 (IH): 1 channel
(IH-only PWM output function)
12-bit interval timer: 1 channel
Real-time clock 2: 1 channel (calendar for 99 years, alarm
function, and clock correction function)
Watchdog timer: 1 channel (operable with the dedicated low-
speed on- chip oscillator)
A/D converter
8/10-bit resolution A/D converter (V
DD
= 1.6 to 5.5 V)
Analog input: 9 to 12 channels
Internal reference voltage (1.45 V) and temperature sensor
Note 1
Comparator
2 channels
Operation mode: Comparator high-speed mode, comparator
low-speed mode, or window mode
External reference voltage and internal reference voltage are
selectable
LCD controller/driver
Segment signal output: 36 (32)
Note 2
to 51 (47)
Note 2
Common signal output: 4 (8)
Note 2
Internal voltage boosting method, capacitor split method, and
external resistance division method are switchable
I/O port
I/O port: 49 to 65 (N-ch open drain I/O [withstand voltage of 6
V]: 2, N-ch open drain I/O [VDD withstand voltage]: 12 to 18)
Can be set to N-ch open drain, TTL input buffer, and on-chip
pull-up resistor
Different potential interface: Can connect to a 1.8/2.5/3 V
device
On-chip key interrupt function
On-chip clock output/buzzer output controller
Others
On-chip BCD (binary-coded decimal) correction circuit
Notes 1. Can be selected only in HS (high-speed main) mode
2. The values in parentheses are the number of signal
outputs when 8 com is used.
Remark
The functions mounted depend on the product. See
1.6 Outline of Functions.
*
There are differences in specifications between every product.
Please refer to specification for details.
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 1 of 123

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