X76F102H-2.0 datasheet, PDF - EEWORLD Datasheet

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X76F102H-2.0: DescriptionThe X76F102 is a Password Access Security Supervisor, containing one 896-bit Secure SerialFlash array; File Size148KB，18 Pages; ManufacturerICmic; Websitehttp://www.icmic.com/

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X76F102H-2.0 Overview

The X76F102 is a Password Access Security Supervisor, containing one 896-bit Secure SerialFlash array

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This X76F102 device has been acquired by

IC MICROSYSTEMS from Xicor, Inc.

ICmic

IC MICROSYSTEMS

ISO 7816 Compatible

X76F102

Secure SerialFlash

DESCRIPTION

128 x 8 bit

FEATURES

•64-bit Password Security

•One Array (112 Bytes) Two Passwords (16 Bytes)

The X76F102 is a Password Access Security Supervisor,

containing one 896-bit Secure Serial Flash array. Access to

the memory array can be controlled by two 64-bit

passwords. These passwords protect read and write

—Read Password

—Write Password

•Programmable Passwords

•Retry Counter Register

—Allows 8 tries before clearing of the array

•32-bit Response to Reset (RST Input)

•8 byte Sector Write mode

•1MHz Clock Rate

•2 wire Serial Interface

•Low Power CMOS

—2.0 to 5.5V operation

—Standby current Less than 1µA

—Active current less than 3 mA

•High Reliability Endurance:

—100,000 Write Cycles

•Data Retention: 100 years

•Available in:

—8 lead PDIP, SOIC, MSOP, TSSOP, and Smart

Card Module

operations of the memory array.

The X76F102 features a serial interface and

software protocol allowing operation on a popular two

wire bus

The bus signals are a clock Input (SCL) and a bidirectional

data input and output (SDA).

The X76F102 also features a synchronous response to reset

providing an automatic output of a hard-wired 32-bit

data stream conforming to the industry standard for

memory cards.

The X76F102 utilizes Xicor’s proprietary Direct Write

cell, providing a minimum endurance of 100,000 cycles and

a minimum data retention of 100 years.

FUNCTIONAL DIAGRAM

Retry Counter

SCL

SCA

Interface

Logic

Data Transfer

Array Access

Enable

Erase Logic

112 byte

EEPROM Array

Password Array

and Password

Verification Logic

RST

ISO Reset

Response Register

©Xicor,

Inc. 1999 Patents Pending

9900-5004.2 1/26/99 EP

Characteristics subject to change without notice

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