FK Series Crystal Clock Oscillator (XO)
3.2 x 2.5mm
3.3V CMOS Low Jitter XO
FK
3.2 x 2.5mm Ceramic SMD
Package:
Recommended Land Pattern:
Product Features
•1
to 156.25 MHz Frequency Range
•<1
ps RMS jitter
•3.3V
CMOS compatible logic levels
•Designed
for standard reflow and washing
techniques
•Low
power standby mode
•Pb-free
and RoHS/Green compliant
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
Pin Functions:
Pin
Function
Product Description
The FK Series 3.3V crystal clock oscillator
achieves superb stability and low power
consumption over a broad range of operating
conditions and frequencies. The low jitter
output clock signal, generated internally with
a non-PLL oscillator design, is compatible with
LVCMOS logic levels. The device, available on
tape and reel, is contained in a 3.2 x 2.5mm
surface-mount ceramic package.
1
2
3
4
OE
Ground
Clock Output
V
DD
Applications
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
Ideal for compact, high-density applications
requiring low power or tight stability, including:
•Network
adapter cards
•Portable
Multimedia Devices
•Hard
Disk Drives
•GPS/Navigation
•Bluetooth
•802.11a/b/g
WiFi
Part Ordering Information:
UM XXX YYYY
FK
YYYY = Specification½Code
XXX = Frequency½Code
Product½Family
Following the above format, Saronix-eCera part numbers will be assigned upon
confirmation of exact customer requirements.
SaRonix-eCera™ is a Pericom® Semiconductor company • US: +1-408-435-0800 TW: +886-3-4518888
• www.saronix-ecera.com
15-0088
All specifications are subject to change without notice.
FK 3.3 REV2015
1
3.3V CMOS Low Jitter XO
FK
FK Series Crystal Clock Oscillator (XO)
3.2 x 2.5mm
Electrical Performance
Parameter
Min.
Typ.
Max.
Units
Notes
Output Frequency
Supply Voltage
Supply Current, Output Enabled
Supply Current, Standby Mode
Frequency Stability
Operating Temperature Range
Output Logic 0, V
OL
Output Logic 1, V
OH
Output Load
Duty Cycle
Rise and Fall Time
Jitter, Phase
Jitter,
Accumulated
Jitter,
Total
1 to 156.25 MHz
up to 75 MHz
75 to 156.25 MHz
up to 75 MHz
75 to 156.25 MHz
1
2.97
3.3
156.25
3.63
10
18
10
±20 to ±50
MHz
V
mA
µA
ppm
°C
V
V
pF
%
ns
ps RMS (1-σ)
ps RMS (1-σ)
ps pk-pk
As specified
1 to 50 MHz
50 to 156.25 MHz
Output Hi-Z
See Note 1 below
Commercial (standard)
Industrial (standard)
-20
-40
90% V
DD
+70
+85
10% V
DD
15
45
55
5
1
5
3
50
30
Measured 50% V
DD
Measured 10/90% of waveform
12kHz to 20 MHz frequency band
20.000 adjacent periods
100.000 random periods
Notes:
1. Stability includes all combinations of operating temperature, load changes, rated input (supply) voltage changes, initial calibration tolerance (25°C),
aging (1 year at 25°C average effective ambient temperature), shock and vibration.
2. For specifications othere than those listed, please contact sales.
Output Enable / Disable Function
Parameter
Min.
Typ.
Max.
Units
Notes
Input Voltage (pin 1), Output Enable
Input Voltage (pin 1), Output Disable (low power standby)
Internal Pullup Resistance
Output Disable Delay
Output Enable Delay
0.7 V
DD
0.3 V
DD
50
100
10
V
V
kΩ
ns
ms
or open
Output is Hi-Z
Absolute Maximum Ratings
Parameter
Min.
Typ.
Max.
Units
Notes
Storage Temperature
For the latest product information visit:
For test circuit go to:
-55
+125
°C
http://www.pericom.com/products/timing/oscillators/FK3.3/
http://www.pericom.com/pdf/sre/tc_hcmos2.pdf
For soldering reflow profile and reliability test ratings go to:
http://www.pericom.com/pdf/sre/reflow.pdf
For tape and reel information go to:
http://www.pericom.com/pdf/sre/tr_3225_xo.pdf
SaRonix-eCera™ is a Pericom® Semiconductor company • US: +1-408-435-0800 TW: +886-3-4518888
• www.saronix-ecera.com
15-0088
All specifications are subject to change without notice.
FK 3.3 REV2015
2
FPGA/CPLD
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