WSF256K8-72CI datasheet, PDF - EEWORLD Datasheet

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WSF256K8-72CI: Description256Kx8 SRAM/ FLASH MODULE; File Size24KB，2 Pages; ManufacturerETC

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WSF256K8-72CI Overview

256Kx8 SRAM/ FLASH MODULE

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WSF256K8-XCX

256Kx8 SRAM/ FLASH MODULE

FIG. 1

PIN CONFIGURATION

TOP VIEW

A18

A16

A15

A12

I/O0

I/O1

I/O2

ADVANCED*

FEATURES

Access Times of 35ns (SRAM) and 70ns (FLASH)

JEDEC Standard, Hermetic Ceramic Package, 32 pin DIP

(Package 300)

256Kx8 SRAM

256Kx8 5V FLASH

Memory Map

Flash Memory: 0H-3FFFFH

SRAM: 40000H-7FFFFH

Low Power CMOS

Commercial, Industrial and Military Temperature Ranges

TTL Compatible Inputs and Outputs

Built-in Decoupling Caps and Multiple Ground Pins for

Low Noise Operation

MIXED MODULES

A17

A14

A13

A11

A10

I/O7

I/O6

I/O5

I/O4

I/O3

FLASH MEMORY FEATURES

PIN DESCRIPTION

0-18

I/O

0-7

Address Inputs

Data Input/Output

Chip Select

Output Enable

Write Enable

+5.0V Power

Ground

10,000 Erase/Program Cycles

Sector Architecture

• 8 equal size sectors of 16KBytes each

• Any combination of sectors can be concurrently erased.

Also supports full chip erase

Data Retention, 10 Years at 125°C

5 Volt Programming; 5V

10% Supply

Embedded Erase and Program Algorithms

Hardware and Software Write Protection

Page Program Operation and Internal Program Control Time

* This data sheet describes a product that may or may not be under

development and is subject to change or cancellation without notice.

BLOCK DIAGRAM

I/O

0-7

128K x 8

Flash

128K x 8

Flash

128K x 8

SRAM

128K x 8

SRAM

Decoder

January 1996

White Microelectronics • Phoenix, AZ • (602) 437-1520

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