WS57C49C
HIGH SPEED 8K
x
8 CMOS PROM/RPROM
KEY FEATURES
•
Ultra-Fast Access Time
— t
ACC
= 25 ns
— t
CS
= 12 ns
•
Pin Compatible with Bipolar PROMs
•
Immune to Latch-UP
— Up to 200 mA
•
Low Power Consumption
•
Fast Programming
•
ESD Protection Exceeds 2000 V
•
Available in 300 Mil DIP and PLDCC
GENERAL DESCRIPTION
The WS57C49C is a High Performance 64K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM
speeds while consuming only 25% of the power required by its Bipolar counterparts. A further advantage of the
WS57C49C over Bipolar PROM devices is the fact that it utilizes a proven EPROM technology. This enables the
entire memory array to be tested for switching characteristics and functionality after assembly. Unlike devices which
cannot be erased, every WS57C49C in a windowed package is 100% tested with worst case test patterns both
before and after assembly.
The WS57C49C is configured in the standard Bipolar PROM pinout which provides an easy upgrade path for
systems which are currently using Bipolar PROMs, or its predecessor, the WS57C49B.
BLOCK DIAGRAM
PIN CONFIGURATION
TOP VIEW
8
A5 - A12
ROW
ADDRESSES
ROW
DECODER
EPROM ARRAY
Chip Carrier
NC
65,536 BITS
CERDIP/Plastic DIP
Flatpack
A
7
A
6
A
5
A
10
A
4
CS1/V
PP
A
3
A
11
A
2
A
12
A
1
NC
A
0
O
7
O
0
O
6
O
1
O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A
8
A
9
A10
CS1/V
PP
A
11
A
12
O
7
O
6
O
5
O
4
O
3
A
5
A
6
A
7
5
A0 - A4
COLUMN
ADDRESSES
V
CC
A
8
A
9
COLUMN
DECODER
SENSE
AMPLIFIERS
A
4
A
3
A
2
A
1
A
0
NC
O
0
4 3 2
28 27 26
1
5
25
6
24
7
23
8
22
9
21
10
20
11
19
12 13 14 15 16 17 18
O
1
O
2
NC O
3
O
4
O
5
CS1/ V
PP
GND
8
OUTPUTS
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
CS to Output Valid Time (Max)
57C49C-25
25 ns
12 ns
57C49C-35
35 ns
20 ns
57C49C-45
45 ns
25 ns
57C49C-55
55 ns
25 ns
57C49C-70
70 ns
25 ns
Return to Main Menu
2-39
WS57C49C
ABSOLUTE MAXIMUM RATINGS*
Storage Temperature............................–65° to + 150°C
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7V
V
PP
with Respect to Ground...................–0.6V to + 13V
ESD Protection ..................................................
>
2000V
MODE SELECTION
PINS
MODE
Read
Output
Disable
Program
Program
Verify
CS1/V
PP
V
IL
V
IH
V
PP
V
IL
V
CC
V
CC
V
CC
V
CC
V
CC
OUTPUTS
D
OUT
High Z
D
IN
D
OUT
*
NOTICE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
OPERATING RANGE
RANGE
Commercial
Industrial
Military
TEMPERATURE
0°C to +70°C
–40°C to +85°C
–55°C to +125°C
V
CC
+5V ± 10%
+5V ± 10%
+5V ± 10%
DC READ CHARACTERISTICS
Over Operating Range. (See Above)
SYMBOL
V
IL
V
IH
V
OL
V
OH
PARAMETER
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
CC
Active Current
(CMOS)
(Note 3)
(Note 3)
I
OL
= 16 mA
I
OH
= –4 mA
V
CC
= 5.5 V, f = 0 MHz (Note 1),
Output Not Loaded
Add 3 mA/MHz for AC Operation
V
CC
= 5.5 V, f = 0 MHz (Note 2),
Output Not Loaded
Add 3 mA/MHz for AC Operation
V
IN
= 5.5V or Gnd
V
OUT
= 5.5 V or Gnd
Comm'l
Industrial
Military
Comm'l
Industrial
Military
–10
–10
2.4
30
35
35
40
50
50
10
10
TEST CONDITIONS
MIN
–0.1
2.0
MAX
0.8
V
CC
+ 0.3
0.4
UNITS
V
V
V
V
mA
mA
mA
mA
mA
mA
µA
µA
I
CC1
I
CC2
V
CC
Active Current
(TTL)
Input Leakage
Current
Output Leakage
Current
I
LI
I
LO
NOTES:
1. CMOS inputs: GND ± 0.3V or V
CC
± 0.3V.
2. TTL inputs: V
IL
≤
0.8V, V
IH
≥
2.0V.
3. These are absolute voltages with respect to device ground pin and include all overshoots due to system and/or tester noise.
Do not attempt to test these values without suitable equipment.
2-40
WS57C49C
AC READ CHARACTERISTICS
Over Operating Range. (See Above)
PARAMETER
Address to Output Delay
CS1 to Output Delay
Output Disable to
Output Float
*
Address to Output Hold
SYMBOL
t
ACC
t
CS
t
DF
t
OH
0
57C49C-25 57C49C-35 57C49C-45 57C49C-55 57C49C-70
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
25
12
12
0
35
20
25
0
45
25
25
0
55
25
25
0
70
25
ns
25
*
Sampled, Not 100% Tested.
AC READ TIMING DIAGRAM
ADDRESSES
VALID
t
ACC
t
OH
CS
t
CS
OUTPUTS
VALID
t
DF
2-41
WS57C49C
CAPACITANCE
(4)
T
A
= 25°C, f = 1 MHz
SYMBOL
C
IN
C
OUT
C
VPP
PARAMETER
Input Capacitance
Output Capacitance
V
PP
Capacitance
CONDITIONS
V
IN
= 0V
V
OUT
= 0V
V
PP
= 0 V
TYP
(5)
4
8
18
MAX
6
12
25
UNITS
pF
pF
pF
NOTES:
4. This parameter is only sampled and is not 100% tested.
5.Typical values are for T
A
= 25°C and nominal supply voltages.
TEST LOAD
(High Impedance Test Systems)
A.C. TESTING INPUT/OUTPUT WAVEFORM
98
Ω
2.01 V
D.U.T.
3.0
1.5
0.0
30 pF
(INCLUDING SCOPE
AND JIG
CAPACITANCE)
TEST
POINTS
1.5
A.C. testing inputs are driven at 3.0 V for a logic "1" and 0.0 V
for a logic "0." Timing measurements are made at 1.5 V for
input and output transitions in both directions.
NOTE:
6. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters.
A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between V
CC
and ground is recommended.
Inadequate decoupling may result in access time degradation or other transient performance failures.
2-42
WS57C49C
NORMALIZED SUPPLY CURRENT
vs.
SUPPLY VOLTAGE
1.60
40.0
35.0
1.40
30.0
NORMALIZED I
CC
DELTA T
aa
(ns)
1.20
25.0
20.0
15.0
10.0
5.0
0.60
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE ( V )
0.0
TYPICAL ACCESS TIME CHANGE
vs.
OUTPUT LOADING
1.00
0.80
0.0
200
400
600
800
1000
CAPACITANCE ( pF )
NORMALIZED Taa
vs.
AMBIENT TEMPERATURE
1.6
1.2
NORMALIZED SUPPLY CURRENT
vs.
AMBIENT TEMPERATURE
1.4
1.1
NORMALIZED T
aa
1.2
NORMALIZED I
CC
1.0
1.0
0.9
0.8
0.6
-55 -35 -15
5
25
45
65
85
105 125
AMBIENT TEMPERATURE (°C )
0.8
-55 -35 -15
5
25
45
65
85
105 125
AMBIENT TEMPERATURE (°C)
2-43
Embedded System
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