WS256K64-XG4WX
256Kx64 SRAM MODULE
FEATURES
s
Access Times 20, 25, 35ns
s
MIL-STD-883 Compliant Devices Available
s
Packaging:
• 116 lead, 40mm, Hermetic CQFP (Package 504)
s
Organized as 256Kx64, User Configurable as 512Kx32 or
1Mx16.
s
Data I/O Compatible with 3.3V devices
s
2V Data Retention devices available
s
Commercial, Industrial and Military Temperature Range
s
5 Volt Power Supply
s
Low Power CMOS
s
TTL Compatible Inputs and Outputs
s
Weight
WS256K64-XG4WX - 20 grams typical
*
This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
ADVANCED*
FIG. 1
PIN CONFIGURATION FOR WS256K64-XG4WX
BLOCK DIAGRAM
TOP VIEW
I/O
2
I/O
1
I/O
0
V
CC
NC
NC
NC
A
0
A
1
A
2
A
3
A
4
WE
1
CS
1
NC
NC
NC
A
5
A
6
A
7
A
8
A
9
NC
CS
4
WE
4
V
CC
I/O
63
I/O
62
I/O
61
OE
A
0-17
WE
1
CS
1
WE
2
CS
2
WE
3
CS
3
WE
4
CS
4
4
SRAM MODULES
256K x 16
256K x 16
256K x 16
256K x 16
September 1998
I/O
29
I/O
30
I/O
31
V
CC
WE
2
CS
2
NC
NC
NC
A
17
A
16
A
15
NC
NC
OE
CS
3
WE
3
A
14
A
13
A
12
A
11
A
10
NC
NC
NC
V
CC
I/O
32
I/O
33
I/O
34
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
GND
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
I/O
60
I/O
59
I/O
58
I/O
57
I/O
56
GND
I/O
55
I/O
54
I/O
53
I/O
52
I/O
51
I/O
50
I/O
49
I/O
48
GND
I/O
47
I/O
46
I/O
45
I/O
44
I/O
43
I/O
42
I/O
41
I/O
40
GND
I/O
39
I/O
38
I/O
37
I/O
36
I/O
35
16
16
16
16
I/O
0-15
I/O
16-31
I/O
32-47
I/O
48-63
PIN DESCRIPTION
I/O
0-63
Data Inputs/Outputs
A
0-17
WE
1-4
CS
1-4
OE
V
CC
GND
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
1
White Microelectronics • Phoenix, AZ • (602) 437-1520
WS256K64-XG4WX
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
V
G
T
J
V
CC
-0.5
Min
-55
-65
-0.5
Max
+125
+150
Vcc + 0.5
150
7.0
Unit
°C
°C
V
°C
V
CS
H
L
L
L
OE
X
L
X
H
X
H
L
H
TRUTH TABLE
WE
Mode
Standby
Read
Write
Out Disable
Data I/O
High Z
Data Out
Data In
High Z
Power
Standby
Active
Active
Active
CAPACITANCE
(T
A
= +25°C)
Parameter
Output Enable Capacitance
Write Enable Capacitance
Chip Select Capacitance
Data I/OCapacitance
Address Input Capacitance
Symbol
C
OE
C
WE
C
CS
C
I
/
O
C
AD
Condition
V
IN
= 0V, f = 1.0MHz
V
IN
= 0V, f = 1.0MHz
V
IN
= 0V, f = 1.0MHz
V
IN
= 0V, f = 1.0MHz
V
IN
= OV, f = 1.OMH
Z
Max
50
20
20
20
50
Unit
pF
pF
pF
pF
pF
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.3
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
4
SRAM MODULES
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
Output Low Voltage
Output High Voltage
Sym
I
LI
I
LO
I
CC
I
SB
V
OL
V
OH
Conditions
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Units
Min
V
CC
= 5.5, V
IN
= GND to V
CC
CS = V
IH
, OE = V
IH
, V
OUT
= GND to V
CC
CS = V
IL
, OE = V
IH
, f = 5MHz, Vcc = 5.5
CS = V
IH
, OE = V
IH
, f = 5MHz, Vcc = 5.5
I
OL
= 8mA, V
CC
= 4.5
I
OH
= -4.0mA, V
CC
= 4.5
2.4
Max
10
10
920
68
0.4
µA
µA
mA
mA
V
V
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
White Microelectronics • Phoenix, AZ • (602) 437-1520
2
WS256K64-XG4WX
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
Symbol
Min
20
-20
Max
Min
25
20
0
20
12
5
0
12
12
5
0
0
-25
Max
Min
35
25
0
25
15
5
0
15
15
-35
Max
Units
ns
35
ns
ns
35
20
ns
ns
ns
ns
15
15
ns
ns
t
OLZ
1
t
CHZ
1
t
OHZ
1
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
t
WHZ
1
t
DH
0
Symbol
Min
20
17
17
12
17
0
2
0
10
0
-20
Max
Min
25
20
20
15
20
0
2
0
10
0
-25
Max
Min
35
25
25
20
25
0
2
0
15
-35
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
4
SRAM MODULES
1. This parameter is guaranteed by design but not tested.
FIG. 2
AC TEST CIRCUIT
Current Source
I
OL
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
D.U.T.
V
Z
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
≈
1.5V
Output Timing Reference Level
C
eff
= 50 pf
(Bipolar Supply)
I
OH
Current Source
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
3
White Microelectronics • Phoenix, AZ • (602) 437-1520
WS256K64-XG4WX
FIG. 3
TIMING WAVEFORM - READ CYCLE
ADDRESS
t
RC
t
AA
CS
t
RC
ADDRESS
t
ACS
t
CLZ
OE
t
CHZ
t
AA
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
OE
t
OLZ
DATA I/O
HIGH IMPEDANCE
t
OHZ
DATA VALID
READ CYCLE 1 (CS = OE = V
IL
, WE = V
IH
)
READ CYCLE 2 (WE = V
IH
)
4
SRAM MODULES
FIG. 4
WRITE CYCLE - WE CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS
t
AH
t
AS
WE
t
WP
t
OW
t
WHZ
t
DW
t
DH
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
FIG. 5
WRITE CYCLE - CS CONTROLLED
ADDRESS
t
WC
WS32K32-XHX
t
AS
t
AW
t
CW
t
AH
CS
t
WP
WE
t
DW
DATA I/O
DATA VALID
t
DH
WRITE CYCLE 2, CS CONTROLLED
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
WS256K64-XG4WX
PACKAGE 504:
116 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4W)
39.6 (1.56)
±
0.38 (0.015) SQ
5.1 (0.200) MAX
1.27 (0.050)
±
0.1 (0.005)
PIN 1 IDENTIFIER
Pin 1
12.7 (0.500)
±
0.5 (0.020)
4 PLACES
5.1 (0.200)
±
0.25 (0.010)
4 PLACES
4
SRAM MODULES
0.25 (0.010)
±
0.05 (0.002)
1.27 (0.050)
REF
38 (1.50) REF
4 PLACES
0.38 (0.015)
±
0.08 (0.003)
68 PLACES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
ORDERING INFORMATION
W S 256K64 - XXX G4W X
DEVICE GRADE:
M = Military Screened
I = Industrial
C = Commercial
PACKAGE:
G4W = 116 Lead 40mm Ceramic Quad Flat Pack, CQFP (Package 504)
ACCESS TIME (ns)
ORGANIZATION, 256K x 64
User configurable as 1M x 16 or 512K x 32
SRAM
WHITE MICROELECTRONICS
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
5
White Microelectronics • Phoenix, AZ • (602) 437-1520
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