Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/_C from 65_ to 125_C
TSSOP Package: −6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
, V
out
T
A
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature Range, All Package Types
Input Rise/Fall Time (Figure 1)
Min
4.5
0
–55
0
Max
5.5
V
CC
+125
500
Unit
V
V
_C
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC CHARACTERISTICS
(Voltages Referenced to GND)
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum High−Level Input Voltage
Maximum Low−Level Input Voltage
Minimum High−Level Output
Voltage
Condition
V
out
= 0.1V
|I
out
|
≤
20mA
V
out
= V
CC
− 0.1V
|I
out
|
≤
20mA
V
in
= V
IL
|I
out
|
≤
20mA
V
in
= V
IL
V
OL
Maximum Low−Level Output
Voltage
V
in
= V
IH
|I
out
|
≤
20mA
V
in
= V
IH
I
in
I
CC
Maximum Input Leakage Current
Maximum Quiescent Supply
Current (per Package)
Additional Quiescent Supply
Current
V
in
= V
CC
or GND
V
in
= V
CC
or GND
I
out
= 0mA
V
in
= 2.4V, Any One Input
V
in
= V
CC
or GND, Other Inputs
I
out
= 0mA
|I
out
|
≤
4.0mA
|I
out
|
≤
4.0mA
V
CC
V
4.5
5.5
4.5
5.5
4.5
5.5
4.5
4.5
5.5
4.5
5.5
5.5
Guaranteed Limit
−55 to 25°C
2.0
2.0
0.8
0.8
4.4
5.4
3.98
0.1
0.1
0.26
±0.1
1
≤85°C
2.0
2.0
0.8
0.8
4.4
5.4
3.84
0.1
0.1
0.33
±1.0
10
≤125°C
2.0
2.0
0.8
0.8
4.4
5.4
3.70
0.1
0.1
0.40
±1.0
40
mA
mA
V
Unit
V
V
V
DI
CC
≥
−55°C
5.5
2.9
25 to 125°C
2.4
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Total Supply Current = I
CC
+
ΣDI
CC
.
www.onsemi.com
2
MC74HCT04A
AC CHARACTERISTICS
(V
CC
= 5.0V
±10%,
C
L
= 50pF, Input t
r
= t
f
= 6ns)
Guaranteed Limit
Symbol
t
PLH
,
t
PHL
t
TLH
,
t
THL
C
in
Parameter
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 2)
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
Maximum Input Capacitance
−55 to 25°C
15
17
15
10
≤85°C
19
21
19
10
≤125°C
22
26
22
10
Unit
ns
ns
pF
Typical @ 25°C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance (Per Inverter)*
22
pF
* Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC2
f + I
CC
V
CC
.
t
f
2.7V
INPUT A
1.3V
0.3V
t
PLH
90%
OUTPUT Y
1.3V
10%
t
TLH
t
THL
*Includes all probe and jig capacitance
t
PHL
GND
DEVICE
UNDER
TEST
OUTPUT
C
L
*
t
r
3.0V
TEST
POINT
Figure 1. Switching Waveforms
Figure 2. Test Circuit
A
Y
Figure 3. Expanded Logic Diagram
(1/6 of the Device Shown)
ORDERING INFORMATION
Device
MC74HCT04ADG
MC74HCT04ADR2G
MC74HCT04ADTR2G
NLV74HCT04ADG*
NLV74HCT04ADR2G*
NLV74HCT04ADTR2G*
Package
SOIC−14 NB
(Pb−Free)
SOIC−14 NB
(Pb−Free)
TSSOP−14
(Pb−Free)
SOIC−14 NB
(Pb−Free)
SOIC−14 NB
(Pb−Free)
TSSOP−14
(Pb−Free)
Shipping
†
55 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
55 Units / Rail
2500 / Tape & Reel
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
www.onsemi.com
3
MC74HCT04A
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
14X
K
REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
_
8
_
INCHES
MIN MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.020 0.024
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0
_
8
_
0.10 (0.004)
0.15 (0.006) T U
S
M
T U
S
V
S
N
2X
L/2
14
8
0.25 (0.010)
M
L
PIN 1
IDENT.
1
7
B
−U−
N
F
DETAIL E
K
0.15 (0.006) T U
S
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T−
SEATING
PLANE
D
G
H
DETAIL E
SOLDERING FOOTPRINT*
7.06
1
14X
0.36
14X
1.26
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
4
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
ÇÇÇ
A
−V−
K1
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
0.65
PITCH
DIMENSIONS: MILLIMETERS
MC74HCT04A
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0
_
7
_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0
_
7
_
D
14
A
B
8
A3
H
1
7
E
L
DETAIL A
0.25
M
B
M
13X
b
0.25
M
C A
A
S
B
S
X 45
_
h
DETAIL A
e
A1
C
SEATING
PLANE
M
SOLDERING FOOTPRINT*
6.50
1
14X
1.18
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone:
303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax:
303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email:
orderlit@onsemi.com
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Phone: 421 33 790 2910
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Order Literature:
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For additional information, please contact your local
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