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Datasheet> All Categories > storage> storage> WMS512K8L-25FFQA
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WMS512K8L-25FFQA

Description
512K X 8 STANDARD SRAM, 20 ns, CDFP36
Categorystorage    storage   
File Size288KB，10 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

WMS512K8L-25FFQA Overview

512K X 8 STANDARD SRAM, 20 ns, CDFP36

WMS512K8L-25FFQA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionCERAMIC, DFP-32
Reach Compliance Codeunknow
Maximum access time25 ns
JESD-30 codeR-CDFP-F32
JESD-609 codee0
memory density4194304 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height3.2004 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.8712 mm

WMS512K8L-25FFQA Preview

White Electronic Designs
512Kx8 MONOLITHIC SRAM, SMD 5962-95613
FEATURES
Access Times 15, 17, 20, 25, 35, 45, 55ns
MIL-STD-883 Compliant Devices Available
Revolutionary, Center Power/Ground Pinout JEDEC
Approved
36 lead Ceramic SOJ (Package 100)
36 lead Ceramic Flat Pack (Package 226)
Evolutionary, Corner Power/Ground Pinout JEDEC
Approved
32 pin Ceramic DIP (Package 300)
32 lead Ceramic SOJ (Package 101)
32 lead Ceramic Thinpack™ Flat Pack
(Package 321)
WMS512K8-XXX
32 pin, Rectangular Ceramic Leadless Chip
Carrier (Package 601)
Commercial, Industrial and Military
Temperature Range
5V Power Supply
Low Power CMOS
Low Power Data Retention for Battery Back-up
Operation
TTL Compatible Inputs and Outputs
*This product is subject to change without notice.
REVOLUTIONARY PINOUT
36 FLAT PACK
36 CSOJ
EVOLUTIONARY PINOUT
32 DIP
32 CSOJ (DE)
32 FLAT PACK (FF)
TOP VIEW
32 CLCC
TOP VIEW
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
A12
A14
A16
A18
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
V
CC
I/O4
TOP VIEW
A0
A1
A2
A3
A4
CS#
I/O0
I/O1
V
CC
V
SS
I/O2
I/O3
WE#
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE#
I/O7
I/O6
V
SS
V
CC
I/O5
I/O4
A14
A13
A12
A11
A10
NC
I/O1
I/O2
I/O3
PIN DESCRIPTION
A0-18
I/O 0-7
CS#
OE#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
October 2004
Rev. 10
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
I/O5
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
4 3 2 1 32 31 30
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
V
SS
White Electronic Designs
Absolute Maximum Ratings
Parameter
Operating Temperature
Storage Temperature Range
Signal Voltage Range to GND
Junction Temperature
Supply Voltage Range (V
CC
)
Symbol
T
A
T
STG
V
G
T
J
V
CC
Min
-55
-65
-0.5
-0.5
Max
+125
+150
V
CC
-0.5
150
7.0
Unit
°C
°C
V
°C
V
CS#
H
L
L
L
OE#
X
L
X
H
WE#
X
H
L
H
WMS512K8-XXX
Truth Table
MODE
Standby
Read
Write
Out Disable
DATA I/O
High Z
Data Out
Data In
High Z
POWER
Standby
Active
Active
Acvive
Recommended Operating Conditions
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.3
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
Capacitance
(T
A
= +25°C)
Parameter
Input capacitance
Symbol
C
IN
Conditions
V
IN
= 0 V, f = 1.0 MHz
Package
32 pin CSOJ, DIP, Flat Pack Evolutionary
32 pin CLCC
36 pin CSOJ & Flat Pack Revolutionary
Output
capacitance
C
OUT
V
OUT
= 0 V, f = 1.0 MHz
32 pin CSOJ, DIP, Flat Pack Revolutionary
36 pin CSOJ & Flat Pack Revolutionary
Speed (ns)
15 to 55
15 to 55
15 to 35
45 to 55
15 to 55
15 to 35
45 to 55
Max
20
15
12
20
20
12
20
Unit
pF
pF
pF
pF
pF
pF
pF
This parameter is guaranteed by design but not tested.
DC Characteristics - CMOS Compatible
(V
CC
= 5.0V, GND = 0V, -55°C
≤T
A
≤
125°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current*
Standby Current
Output Low Voltage
Output High Voltage
Symbol
I
LI
I
LO
I
CC
I
SS
V
OL
V
OH
Conditions
V
CC
= 5.5, V
IN
= GND to V
CC
CS# = V
IH
, OE# = V
IH
, V
OUT
= GND TO V
CC
CS# = V
IH
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5,
CS# = V
IH
, OE# = V
IH
, f = 5MHz, V
CC
= 5.5
I
OL
= 6mA for 17 - 35ns,
I
OL
= 2.1mA for 45 - 55ns, V
CC
= 4.5
I
OH
= -4.0mA for 17 - 35ns,
I
OH
= 1.0mA for 45 - 55ns, V
CC
= 4.5
Min
Max
10
10
160
0.45
0.4
Unit
A
A
mA
mA
V
V
2.4
Data retention characteristics for low power “l” version
Parameter
Data Retention Supply Voltage
Low Power Data Retention
Low Power Data Retention
Symbol
V
DR
I
CCDR1
I
CCDR2
Conditions
CS# V
CC
-0.2V
V
CC
= 3V
V
CC
= 2V
3
Min
2.0
Max
5.5
7
2
Unit
V
mA
mA
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
October 2004
Rev. 10
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
AC Characteristics
(V
CC
= 5.0V, GND = 0V, -55°C
≤
T
A
< 125°C)
Parameter
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Symbol
tRC
tAA
tOH
tACS
tOE
tCLZ1
tOLZ1
tCHZ1
tOHZ1
WMS512K8-XXX
-15
Min
15
0
15
8
2
0
8
8
2
0
Max
15
0
-17
Min
17
Max
17
0
17
9
2
0
9
9
Min
20
-20
Max
20
0
20
10
2
0
10
10
Min
25
-25
Max
25
0
25
12
4
0
12
12
-35
Min
35
Max
35
0
35
25
4
0
15
15
Min
45
-45
Max
45
0
45
25
4
0
20
20
Min
55
-55
Max
55
55
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
20
AC Characteristics
(V
CC
= 5.0V, GND = 0V, -55°C
≤
T
A
≤
125°C)
Parameter
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
Symbol
tWC
tCW
tAW
tDW
tWP
tAS
tAH
tOW1
tWHZ1
tDH
-15
Min
15
13
13
8
13
2
0
2
0
Max
Min
17
14
14
9
14
2
0
2
0
-17
Max
Min
20
14
14
10
14
2
0
3
0
-20
Max
-25
Min
25
15
15
10
15
2
0
4
0
Max
-35
Min
35
25
25
20
25
2
0
4
0
Max
-45
Min
45
35
35
25
35
2
5
5
0
Max
-55
Min
55
50
50
25
40
2
5
5
0
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
9
9
10
15
20
25
1. This parameter is guaranteed by design but not tested.
AC TEST CIRCUIT
I
OL
Current Source
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
V
Z
≈
1.5V
(Bipolar Supply)
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
D.U.T.
C
eff
= 50 pF
I
OH
Current Source
Notes:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z0 = 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
October 2004
Rev. 10
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
TIMING WAVEFORM - READ CYCLE
WMS512K8-XXX
t
RC
ADDRESS
t
AA
t
RC
ADDRESS
CS#
t
AA
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
ACS
t
CLZ
OE#
t
OE
t
CHZ
t
OHZ
DATA VALID
READ CYCLE 1 (CS# = OE# = V
IL
, WE# = V
IH
)
t
OLZ
DATA I/O
HIGH IMPEDANCE
READ CYCLE 2 (WE# = V
IH
)
WRITE CYCLE - WE# CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS#
t
AH
t
AS
WE#
t
WP
t
OW
t
WHZ
t
DW
DATA VALID
t
DH
DATA I/O
WRITE CYCLE 1, WE# CONTROLLED
WRITE CYCLE - CS# CONTROLLED
t
WC
ADDRESS
t
AW
t
AS
CS#
t
CW
t
AH
t
WP
WE#
t
DW
t
DH
DATA I/O
WRITE CYCLE 2, CS# CONTROLLED
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
October 2004
Rev. 10
4
DATA VALID
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
PACKAGE 100: 36 LEAD, CERAMIC SOJ
23.37 (0.920)
±
0.25 (0.010)
0.2 (0.008)
±
0.05 (0.002)
WMS512K8-XXX
4.7 (0.184) MAX
0.89 (0.035)
Radius TYP
11.23 (0.442)
±
0.30 (0.012)
9.55 (0.376)
±
0.25 (0.010)
1.27 (0.050)
±
0.25 (0.010)
1.27 (0.050) TYP
21.6 (0.850) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 101: 32 LEAD, CERAMIC SOJ
21.1 (0.830)
±
0.25 (0.010)
0.2 (0.008)
±
0.05 (0.002)
3.96 (0.156) MAX
0.89 (0.035)
Radius TYP
11.23 (0.442)
±
0.30 (0.012)
9.55 (0.376)
±
0.25 (0.010)
1.27 (0.050)
±
0.25 (0.010)
1.27 (0.050) TYP
19.1 (0.750) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
October 2004
Rev. 10
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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