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ADCLK905BCPZ-R7

Description
Clock Buffer 2-OUT 1-IN 1:1 16-Pin LFCSP EP T/R
File Size683KB,16 Pages
ManufacturerADI
Websitehttps://www.analog.com
Environmental Compliance
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ADCLK905BCPZ-R7 Overview

Clock Buffer 2-OUT 1-IN 1:1 16-Pin LFCSP EP T/R

ADCLK905BCPZ-R7 Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)EAR99
Part StatusActive
HTS8542.39.00.01
TypeBuffer
Fanout1:1
Number of Outputs per Chip2
Maximum Propagation Delay Time @ Maximum CL (ns)0.095(Typ)@3.3V
Absolute Propagation Delay Time (ns)0.125
Input Logic LevelECL
Output Logic LevelECL
Minimum Operating Supply Voltage (V)-2.375|2.375
Typical Operating Supply Voltage (V)-2.5|-3.3|2.5|3.3
Maximum Operating Supply Voltage (V)-3.63|3.63
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)125
Supplier Temperature GradeExtended Industrial
PackagingTape and Reel
Pin Count16
Standard Package NameCSP
Supplier PackageLFCSP EP
MountingSurface Mount
Package Height0.73
Package Length3
Package Width3
PCB changed16
Lead ShapeNo Lead
Data Sheet
FEATURES
95 ps propagation delay
7.5 GHz toggle rate
60 ps typical output rise/fall
60 fs random jitter (RJ)
On-chip terminations at both input pins
Extended industrial temperature range: −40°C to +125°C
2.5 V to 3.3 V power supply (V
CC
− V
EE
)
Ultrafast SiGe
ECL Clock/Data Buffers
ADCLK905/ADCLK907/ADCLK925
TYPICAL APPLICATION CIRCUITS
V
REF
V
T
V
CC
D
D
Q
Q
06318-001
V
EE
APPLICATIONS
Clock and data signal restoration and level shifting
Automated test equipment (ATE)
High speed instrumentation
High speed line receivers
Threshold detection
Converter clocking
Figure 1. ADCLK905 ECL 1:1 Clock/Data Buffer
V
REF
1
V
T
1
V
CC
D1
D1
V
EE
V
EE
D2
D2
V
CC
V
REF
2
06318-002
Q1
Q1
GENERAL DESCRIPTION
The ADCLK905 (one input, one output), ADCLK907 (dual one
input, one output), and ADCLK925 (one input, two outputs) are
ultrafast clock/data buffers fabricated on the Analog Devices, Inc.,
proprietary XFCB3 silicon germanium (SiGe) bipolar process.
The ADCLK905/ADCLK907/ADCLK925 feature full-swing
emitter coupled logic (ECL) output drivers. For PECL (positive
ECL) operation, bias V
CC
to the positive supply and V
EE
to ground.
For NECL (negative ECL) operation, bias V
CC
to ground and
V
EE
to the negative supply.
The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate,
10 Gbps data rate, and 60 fs random jitter (RJ).
The inputs have center tapped, 100 Ω, on-chip termination
resistors. A V
REF
pin is available for biasing ac-coupled inputs.
The ECL output stages are designed to directly drive 800 mV
each side into 50 Ω terminated to V
CC
− 2 V for a total
differential output swing of 1.6 V.
The ADCLK905/ADCLK907/ADCLK925 are available in
16-lead LFCSP packages.
Q2
Q2
V
T
2
Figure 2. ADCLK907 ECL Dual 1:1 Clock/Data Buffer
V
REF
V
T
V
CC
Q1
Q1
D
D
Q2
06318-003
Q2
V
EE
Figure 3. ADCLK925 ECL 1:2 Clock/Data Fanout Buffer
Rev. B
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

ADCLK905BCPZ-R7 Related Products

ADCLK905BCPZ-R7 ADCLK905BCPZ-R2
Description Clock Buffer 2-OUT 1-IN 1:1 16-Pin LFCSP EP T/R Clock Buffer 2-OUT 1-IN 1:1 16-Pin LFCSP EP T/R
EU restricts the use of certain hazardous substances Compliant Compliant
ECCN (US) EAR99 EAR99
Part Status Active Active
HTS 8542.39.00.01 8542.39.00.01
Type Buffer Buffer
Fanout 1:1 1:1
Number of Outputs per Chip 2 2
Maximum Propagation Delay Time @ Maximum CL (ns) 0.095(Typ)@3.3V 0.095(Typ)@3.3V
Absolute Propagation Delay Time (ns) 0.125 0.125
Input Logic Level ECL ECL
Output Logic Level ECL ECL
Minimum Operating Supply Voltage (V) -2.375|2.375 -2.375|2.375
Typical Operating Supply Voltage (V) -2.5|-3.3|2.5|3.3 -2.5|-3.3|2.5|3.3
Maximum Operating Supply Voltage (V) -3.63|3.63 -3.63|3.63
Minimum Operating Temperature (°C) -40 -40
Maximum Operating Temperature (°C) 125 125
Supplier Temperature Grade Extended Industrial Extended Industrial
Packaging Tape and Reel Tape and Reel
Pin Count 16 16
Standard Package Name CSP CSP
Supplier Package LFCSP EP LFCSP EP
Mounting Surface Mount Surface Mount
Package Height 0.73 0.83
Package Length 3 3
Package Width 3 3
PCB changed 16 16
Lead Shape No Lead No Lead
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