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OKDL-T/12-W12-xxx-C
12A Digital PoL DC-DC Converter Series
Typical unit
FEATURES
package: 12.2 x 12.2 x 8.0 mm (0.48 x 0.48 x 0.315 in)
Small
V - 5 V output voltage range
0.6
efficiency, typ. 95.4% at 12Vin, 5Vout and 50% load
High
guration Control and Monitoring via PMBus™
Confi
Adaptive compensation of PWM control loop & fast loop
transient response
Synchonization input & phase spreading/interleaving
Voltage Tracking & Voltage margining
MTBF 24 Mh
narrow board pitch applications (15 mm/0.6 in)
For
Pre-bias start-up & shut down
Monotonic & Soft start Power up
under voltage shutdown; OTP, output OVP, OCP
Input
Remote control & Power Good
Differential sense pins
Voltage setting via pin-strap or PMBus™
Advanced Configurable via Graphical User Interface
9001/14001 certified supplier
ISO
Highly automated manufacturing ensures quality
PRODUCT OVERVIEW
The OKDL-T/12-W12 is a high efficiency,
digital point-of-Load (PoL) DC-DC power
converter capable of delivering 12A/60W.
Designed for a minimal footprint, the high
power-density LGA module measures
just 12.2 x 12.2 x 8.0 mm (0.48 x 0.48 x
0.315 in).
PMBus™ compatibility allows monitor-
ing and confi guration of critical system-
level performance requirements.
Apart from standard PoL performance
and safety features like OVP, OCP, OTP,
and UVLO, these digital converters have
advanced features: Adaptive compen-
sation of PWM control loop, fast loop
transient response, synchronization,
and phase spreading. These converters
are ideal for use in telecommunica-
tions, networking, and distributed power
applications.
Applications
Distributed power architectures
Intermediate bus voltage applications
Servers and storage applications
Network equipment
PART NUMBER STRUCTURE
OKD L
-
T
/
12
-
W12
-
xxx
-
C
Digital Non-isolated PoL
RoHS Hazardous
Substance Compliance
C
= RoHS-6 (does not claim EU RoHS exemption
7b – lead in solder)
LGA Package
Trimmable Output
Voltage Range
0.6 - 5Vdc
Software Configuration Digits
(001 is positive turn-on logic)
(002 is negative turn-on logic)*
*Special quantity order is required;
contact Murata Power Solutions for
MOQ and lead times.
Maximum Rated Output
Current in Amps
Input Voltage Range
4.5-14Vdc
PM
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Page 1 of 31
OKDL-T/12-W12-xxx-C
12A Digital PoL DC-DC Converter Series
ORDERING GUIDE
Model Number
OKDL-T/12-W12-001-C
Output
0.6-5.0 V, 12 A/ 60 W
Absolute Maximum Ratings
Characteristics
T
P1
Operating temperature (see Thermal Consideration section)
T
S
Storage temperature
V
I
Input voltage (See Operating Information Section for input and output voltage relations)
Logic I/O voltage
CTRL, SA0, SA1, SALERT, SCL, SDA, VSET, SYNC, PG, CS_VTRK
Ground voltage differential -S, PREF, GND
Analog pin voltage
VO, +S
General and Safety
Safety
Calculated MTBF
Conditions
Designed for UL/IEC/EN 60950 1
Telcordia SR-332, Issue 2 Method 1
Min
-40
-40
-0.3
-0.3
-0.3
-0.3
Min
Typ
Max
120
125
18
4
0.3
5.5
Max
Unit
°C
°C
V
V
V
V
Unit
Mhrs
Typ
24
Stress in excess of Absolute Maximum Ratings may cause permanent
damage. Absolute Maximum Ratings, sometimes referred to as no
destruction limits, are normally tested with one parameter at a time
exceeding the limits in the Electrical Specification. If exposed to stress
above these limits, function and performance may degrade in an
unspecified manner.
Configuration File
This product is designed with a digital control circuit. The control
circuit uses a configuration file which determines the functionality
and performance of the product. The Electrical Specification table
shows parameter values of functionality and performance with the
default configuration file, unless otherwise specified. The default
configuration file is designed to fit most application needs with focus
on high efficiency. If different characteristics are required it is pos-
sible to change the configuration file to optimize certain performance
characteristics.
In this Technical specification examples are included to show the
possibilities with digital control. See Operating Information section for
information about trade offs when optimizing certain key performance
characteristics.
VIN
CI
CO
VOUT
GND
+Sense
-Sense
CTRL
SDA
SCL
SALERT
CS_VTRK
PREF
Controller and digital interface
PGOOD
SA0
SYNC
VSET
SA1
Fundamental Circuit Diagram
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OKDL-T/12-W12-xxx-C
12A Digital PoL DC-DC Converter Series
Electrical Specifications
T
P1
= -30 to +95°C, V
I
= 4.5 to 14 V, V
I
> V
O
+ 1.0 V
Typical values given at: T
P1
= +25°C, V
I
= 12.0 V, max I
O
, unless otherwise specified under Conditions.
Default configuration file, 190 10-CDA 102 0370/001. V
O
defined by pin strap.
External C
IN
= 47 μF ceramic + 270 μF/10 mΩ electrolytic, C
OUT
= 3x100 μF + 0.1 μF ceramic.
See Operating Information section for selection of capacitor types. Sense pins are connected to the output pins.
Characteristics
V
I
Input voltage
Output voltage without pin strap
Output voltage adjustment range
Output voltage adjustment including PMBus margining
Output voltage set-point resolution
Output voltage accuracy
Internal resistance +S/-S to VOUT/GND
+S bias current
-S bias current
V
O
Line regulation
I
O
= max I
O
Conditions
Min
4.5
0.60
0.50
1.2
Including line, load, temp
-1
47
50
-35
1
2
3
4
7
1
1
1
2
2
10
10
11
19
25
0
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
RMS, hiccup mode,
V
O
= 3.3 V, 4 mΩ short
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
Turned off with CTRL-pin
0.7
1.3
2.0
3.5
5.2
15
3
78.8
87.5
90.8
94.1
95.4
81.3
89.0
91.8
94.6
95.8
1.66
1.78
1.93
2.24
2.63
0.70
0.70
0.71
0.80
0.92
0.25
12
1
Typ
0
5.0
5.25
Max
14
Unit
V
V
V
V
mV
% V
O
Ω
μA
μA
Load regulation
I
O
= 0 - 100%
V
Oac
Output ripple & noise
(up to 20 MHz)
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
V
O
= 0.6 V
V
O
= 1.2 V
V
O
= 1.8 V
V
O
= 3.3 V
V
O
= 5.0 V
mV
mV
mVp-p
I
O
Output current
A
I
S
Static input current at max I
O
A
I
lim
I
sc
Current limit threshold
Short circuit current
17
A
A
50% of max I
O
Efficiency
I
O
= max I
O
%
%
P
d
Power dissipation at max I
O
W
P
li
Input idling power
I
O
= 0
W
P
CTRL
Input standby power
W
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OKDL-T/12-W12-xxx-C
12A Digital PoL DC-DC Converter Series
Characteristics
C
I
Internal input capacitance
C
O
C
OUT
Internal output capacitance
Conditions
V
I
= 0 V
V
O
= 0 V
V
O
= 3.3 V
V
O
= 5.0 V
Effective capacitance
Note 1
Load step 25-75-25% of max I
O
, di/dt
= 1.5 A/μs
C
O
=3x100 μF + 270 μF
V
O
= 3.3 V
Min
Typ
47
47
24
15
Max
Unit
μF
μF
μF
Total output capacitance
55
V
tr1
t
tr1
Load transient peak voltage deviation
Load transient recovery time
Switching frequency
Switching frequency range
60
25
600
mV
μs
kHz
kHz
10
60
10
4.4
%
%
%
V
V
16
V
V
V
V
V
V
V
V
V
mV
F
sw
Switching frequency set-point accuracy
External Sync Duty Cycle
Input Clock Frequency Drift Tolerance
Input Under Voltage Lockout
(hardware controlled)
Input Over Voltage Lockout
(hardware controlled)
Input Turn-On Voltage
Threshold, V
UVLO
Hysteresis
Threshold, V
OVLO
Threshold
Threshold range
Threshold
Input Turn-Off Voltage
Threshold range
IUVP threshold
IUVP threshold range
Input Under/Over Voltage
Protection,
IUVP/ IOVP
IOVP threshold
IOVP threshold range
Set point accuracy
Fault response
UVP threshold
UVP threshold range
Output voltage
Over/Under Voltage Protection,
OVP/UVP
OVP threshold
OVP threshold range
Fault response
OCP threshold
Over Current Protection,
OCP
OCP threshold range
Fault response
OTP threshold
Over Temperature Protection,
OTP
OTP threshold range
OTP hysteresis
Fault response
Over Temperature Shutdown
(hardware controlled)
Threshold
Hysteresis
Accuracy
PMBus configurable
FREQUENCY_SWITCH
Note 2
-10
40
-10
3.8
300-1000
±5
External clock source
Rising edge
4.1
0.24
Input rising
PMBus configurable
VIN_ON
PMBus configurable
VIN_OFF
PMBus configurable
VIN_UV_FAULT_LIMIT
PMBus configurable
VIN_OV_FAULT_LIMIT
VIN_UV_FAULT_RESPONSE
VIN_OV_FAULT_RESPONSE
PMBus configurable
VOUT_UV_FAULT_LIMIT
PMBus configurable
VOUT_OV_FAULT_LIMIT
VOUT_UV_FAULT_RESPONSE
VOUT_OV_FAULT_RESPONSE
Set value
PMBus configurable
IOUT_OC_FAULT_LIMIT
IOUT_OC_FAULT_RESPONSE
Note 4
PMBus configurable
OT_FAULT_LIMIT
PMBus configurable
OT_FAULT_RESPONSE
Note 4
14.3
15.2
4.35
0-14.7
3.8
0-14.7
4.1
0-14.7
14.4
0-14.7
-150
150
Shutdown, make continuous restarts at 700 ms
interval (hiccup). Note 3
85
0-100
115
100-115
Shutdown, make continuous restarts at 700 ms
interval (hiccup). Note 3
16
0-18
Shutdown, make continuous restarts at 700 ms
interval (hiccup). Note 3.
120
-40…+120
15
Shutdown, make continuous restarts at 700 ms
interval (hiccup). Note 3
150
20
±20
% V
O
% V
O
% V
O
% V
O
A
A
°C
°C
°C
°C
°C
°C
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Page 4 of 31
OKDL-T/12-W12-xxx-C
12A Digital PoL DC-DC Converter Series
Characteristics
V
OL
Logic output low signal level
V
OH
I
OL
I
OH
V
IL
V
IH
I
IL_CTRL
I
I_LEAK
f
SMB
T
BUF
t
set
t
hold
T
low
T
high
Logic output high signal level
Logic output low sink current
Logic output high source current
Logic input low threshold
Logic input high threshold
Logic input low sink current
Logic leakage current
SMBus Operating frequency
SMBus Bus free time
SMBus SDA setup time from SCL
SMBus SDA hold time from SCL
SMBus START/STOP condition setup/hold time from SCL
SCL low period
SCL high period
From V
I
> V
UVLO
to ready to be enabled
Delay duration
Soft-start
On Delay Time
Note 5
Delay duration range
Delay set resolution
Delay set accuracy
Delay accuracy
Ramp duration
Soft-start
Rise Time
(0-100% of V
O
)
Note 5
Ramp duration range
Ramp set resolution
Ramp set accuracy
Ramp time accuracy
Signal duration
Compensation Calibration
Signal level
V
O
= 0.6 V
V
O
= 1.2 – 3.3 V
V
O
= 5.0 V
Rising
Falling
Tracking mode
See section Voltage Tracking
PMBus configurable
POWER_GOOD_ON
POWER_GOOD_OFF
From V
O
reaching target to PG assertion
Tracking mode
See section Voltage Tracking
From V
O
reaching PG rising threshold to
PG assertion
Tracking mode
See section Voltage Tracking
PMBus configurable
TON_RISE
Varies with V
O
TON_RISE value sent versus read-back
Actual ramp duration versus TON_RISE
read-back
TON_DELAY value sent versus read-
back
Actual delay duration versus TON_DE-
LAY read-back
PMBus configurable
TON_DELAY
Conditions
SCL, SDA, SYNC, SALERT, PG
Sink/source current = 4 mA
Min
Typ
Max
0.4
Unit
V
V
4
4
0.8
2
0.5
10
400
STOP bit to START bit
See section SMBus – Timing
1.3
100
300
600
1.3
0.6
23
10
1-145
0.6
±0.5 x Delay set resolution
±0.8
10
1 - (255 x Ramp set resolution)
0.4
±0.5 x Ramp set resolution
±10
5
3.5
2.5
2
90
85
450
0
11
20
0
20
100
1
mA
mA
V
V
mA
uA
kHz
μs
ns
ns
ns
μs
μs
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
μs
ms
% V
O
2.8
SCL, SDA, CTRL, SYNC
CTRL
SCL, SDA, SYNC, SALERT, PG
Initialization time
PG threshold
% V
O
% V
O
mV
% V
O
ms
ms
ms
ms
PG thresholds range
(Non-tracking only)
Power Good , PG
PG delay
Enabled compensation calibration
(default)
PG delay
Disabled compensation calibration
Tracking Input Voltage Range
Tracking Accuracy
CS_VTRK pin
Note 6
0
-100
1.2
100
V
mV
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