LTC2654BIUF-L16#PBF datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> converter> LTC2654BIUF-L16#PBF

LTC2654BIUF-L16#PBF: DescriptionIC DAC 16BIT SRL 20QFN; CategoryAnalog mixed-signal IC converter; File Size336KB，24 Pages; ManufacturerLinear ( ADI ); Websitehttp://www.analog.com/cn/index.html; Environmental Compliance

Download Datasheet Parametric View All

LTC2654BIUF-L16#PBF Overview

IC DAC 16BIT SRL 20QFN

LTC2654BIUF-L16#PBF Parametric

Parameter Name	Attribute value
Brand Name	Linear Technology
Is it Rohs certified?	conform to
Maker	Linear ( ADI )
Parts packaging code	QFN
package instruction	HVQCCN, LCC20,.16SQ,20
Contacts	20
Manufacturer packaging code	UF
Reach Compliance Code	compliant
Maximum analog output voltage	2.5 V
Minimum analog output voltage
Converter type	D/A CONVERTER
Enter bit code	BINARY
Input format	SERIAL
JESD-30 code	S-PQCC-N20
JESD-609 code	e3
length	4 mm
Maximum linear error (EL)	0.0061%
Humidity sensitivity level	1
Number of digits	16
Number of functions	1
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC20,.16SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/5 V
Certification status	Not Qualified
Maximum seat height	0.8 mm
Nominal settling time (tstl)	8.9 µs
Maximum slew rate	2.5 mA
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4 mm

Preview

Download Datasheet

View All

FEATURES

LTC2654

Quad 16-/12-Bit Rail-to-Rail

DACs with 10ppm/°C

Max Reference

DESCRIPTION

The LTC

2654 is a family of quad 16-/12-bit rail-to-rail

DACs with integrated 10ppm/°C maximum reference . The

DACs have built-in high performance, rail-to-rail, output

buffers and are guaranteed monotonic. The LTC2654-L

has a full-scale output of 2.5V with the integrated refer-

ence and operates from a single 2.7V to 5.5V supply.

The LTC2654-H has a full-scale output of 4.096V with

the integrated reference and operates from a 4.5V to

5.5V supply. Each DAC can also operate with an external

reference, which sets the full-scale output to 2 times the

external reference voltage.

These DACs communicate via a SPI/MICROWIRE compat-

ible 4-wire serial interface which operates at clock rates

up to 50MHz. The LTC2654 incorporates a power-on reset

circuit that is controlled by the PORSEL pin. If PORSEL

is tied to GND the DACs reset to zero-scale. If PORSEL is

tied to V

, the DACs reset to mid-scale.

LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Protected by U.S. Patents, including 5396245, 6891433 and patent pending.

Precision Reference 10ppm/°C Max

Maximum INL Error: ±4LSB at 16-Bits

Low ±2mV (Max) Offset Error

Guaranteed Monotonic Over Temperature

Selectable Internal or External Reference

2.7V to 5.5V Supply Range (LTC2654-L)

Integrated Reference Buffers

Ultralow Crosstalk Between DACs (<3nV•s)

Power-on-Reset to Zero-Scale/Mid-Scale

Asynchronous DAC Update Pin

Tiny 20-Lead 4mm

4mm QFN and 16-Lead Narrow

SSOP Packages

APPLICATIONS

Mobile Communications

Process Control and Industrial Automation

Instrumentation

Automatic Test Equipment

Automotive

BLOCK DIAGRAM

REFCOMP

GND

REFLO

OUTA

DAC A

DAC D

OUTD

INL (LSB)

–1

–2

–3

CONTROL LOGIC

SCK

SDI

LDAC

32-BIT SHIFT REGISTER

CLR

DECODE

POWER-ON

RESET

PORSEL

SDO

–4

128

16384

32768

CODE

49152

65535

2654 TA01b

INTERNAL REFERENCE

REFIN/OUT

INL Curve

= 5V

OUTB

DAC B

DAC C

OUTC

CS/LD

2654 TA01a

2654f

Recommended Resources

The internal circuit of SHM1150 II

Electromechanical control button for interlocking protection motor reversible starting control circuit

Low power non-inverting amplifier circuit diagram with digital input and gain selection

Simple natural wind simulation circuit

Fake lock alarm

Bidirectional intertransistor control circuit

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components