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VSC8141TW

Description
Multi-Rate 16:1 SONET/SDH Transceiver with Integrated Clock Generator
CategoryWireless rf/communication    Telecom circuit   
File Size9KB,1 Pages
ManufacturerVitesse Semiconductor Corporation
Websitehttp://www.vitesse.com/
Download Datasheet Parametric Compare View All

VSC8141TW Overview

Multi-Rate 16:1 SONET/SDH Transceiver with Integrated Clock Generator

VSC8141TW Parametric

Parameter NameAttribute value
MakerVitesse Semiconductor Corporation
Parts packaging codeBGA
package instructionLBGA,
Contacts208
Reach Compliance Codecompli
JESD-30 codeS-PBGA-B208
length23 mm
Number of functions1
Number of terminals208
Package body materialPLASTIC/EPOXY
encapsulated codeLBGA
Package shapeSQUARE
Package formGRID ARRAY, LOW PROFILE
Certification statusNot Qualified
Maximum seat height1.65 mm
Nominal supply voltage3.3 V
surface mountYES
Telecom integrated circuit typesATM/SONET/SDH TRANSCEIVER
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
width23 mm
Product Summary
VSC8141
Multi-Rate 16:1 SONET/SDH Transceiver with Integrated Clock Generator
Features
• Multi-Rate Transceiver for SONET OC-48, OC-24
OC-12, OC-3, and Gigabit Ethernet Rates
• 16-Bit LVPECL Low-Speed Interface
• On-Chip PLL-Based Clock Generator
• High-Speed Clock Output Power-Down Option
• Equipment, Facility and Split Loopback Modes
• Loss of Signal (LOS) Detect Input
• Exceeds Bellcore Jitter Specifications
• Single 3.3V Power Supply
• 1.8 W Typical Power Dissipation
• Packages: 128-Pin PQFP (14x20x2mm) or
208-Pin TBGA 23x23x1.55mm)
General Description
The VSC8141 is a SONET/SDH compatible 3.3V multi-rate transceiver with integrated clock generator for
use in SONET/SDH systems operating at OC-48, OC-24, OC-12, OC-3, or Gigabit Ethernet data rates. The
internal clock generator uses a phase-locked loop (PLL) to multiply either a 77.76MHz or 155.52MHz reference
clock for internal logic and output retiming. The 16-bit parallel LVPECL interface incorporates an on-board
FIFO to address loop timing design issues. Facility and Equipment Loopbacks can be configured separately or
simultaneously. The VSC8141 supports 3.3V operation with 2.3 Watts maximum power (1.8 Watts typical) and
is packaged in a thermally-enhanced 128-pin PQFP or 208-pin TBGA package.
Block Diagram
VSC8141
High-Speed Data
High-Speed Clock
DEMUX
16
Low-Speed Data
Low-Speed Clock
High-Speed Loopback
Test
Low-Speed Loopback
OC-48/12/3 GbE Control
CMU
Reference Clock
16
Low-Speed Data
Low-Speed Clock
High-Speed Data
High-Speed Clock
MUX
FIFO
Low-Speed Clock
Order Information
Product
Package
VSC8141QR
VSC8141TW
Notice
128-Pin PQFP, 14x20mm
208-Pin TBGA, 23x23mm
Vitesse Semiconductor Corporation (“Vitesse”) provides this document for informational purposes only. This document contains pre-production information about Vit-
esse products in their concept, development and/or testing phase. All information in this document, including descriptions of features, functions, performance, technical
specifications and availability, is subject to change without notice at any time. Nothing contained in this document shall be construed as extending any warranty or
promise, express or implied, that any Vitesse product will be available as described or will be suitable for or will accomplish any particular task.
Vitesse products are not intended for use in life support appliances, devices or systems. Use of a Vitesse product in such applications without written consent is prohib-
ited.
PS040201.1
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800)-VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com

VSC8141TW Related Products

VSC8141TW VSC8141QR VSC8141
Description Multi-Rate 16:1 SONET/SDH Transceiver with Integrated Clock Generator Multi-Rate 16:1 SONET/SDH Transceiver with Integrated Clock Generator Multi-Rate 16:1 SONET/SDH Transceiver with Integrated Clock Generator
Maker Vitesse Semiconductor Corporation Vitesse Semiconductor Corporation -
Parts packaging code BGA QFP -
package instruction LBGA, HFQFP, -
Contacts 208 128 -
Reach Compliance Code compli compli -
JESD-30 code S-PBGA-B208 R-PQFP-G128 -
length 23 mm 20 mm -
Number of functions 1 1 -
Number of terminals 208 128 -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code LBGA HFQFP -
Package shape SQUARE RECTANGULAR -
Package form GRID ARRAY, LOW PROFILE FLATPACK, HEAT SINK/SLUG, FINE PITCH -
Certification status Not Qualified Not Qualified -
Maximum seat height 1.65 mm 2.35 mm -
Nominal supply voltage 3.3 V 3.3 V -
surface mount YES YES -
Telecom integrated circuit types ATM/SONET/SDH TRANSCEIVER ATM/SONET/SDH TRANSCEIVER -
Terminal form BALL GULL WING -
Terminal pitch 1.27 mm 0.5 mm -
Terminal location BOTTOM QUAD -
width 23 mm 14 mm -
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