1520
10-TAP DIP/SMD DELAY LINE
T
D
/T
R
= 5
(SERIES 1520)
FEATURES
•
•
•
•
•
10 taps of equal delay increment
Delays to 1000ns
Low profile
Epoxy encapsulated
Meets or exceeds MIL-D-23859C
GND
T1
T3
T5
T6
T8
T10
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IN
N/C
T2
T4
T7
T9
GND
PACKAGES
IN
Signal Input
T1-T10 Tap Outputs
GND Ground
Note: Standard pinout shown
Other pinouts available
FUNCTIONAL DESCRIPTION
The 1520-series device is a fixed, single-input, ten-output,
passive delay line. The signal input (IN) is reproduced at the
outputs (T1-T10) in equal increments. The delay from IN to T10
(T
D
) and the characteristic impedance of the line (Z) are
determined by the dash number. The rise time (T
R
) of the line is
20% of T
D
, and the 3dB bandwidth is given by 1.75 / T
D
. The
device is available in a 14-pin DIP (1520) or a 14-pin SMD
(1520S), and a wide range of pinouts may be specified.
Part numbers are constructed according to the scheme shown
at right. For example, 1520C-101-500B is a 290 mil DIP,
100ns, 50Ω delay line with pinout code B. Similarly, 1520SB-
201-251 is a 240 mil SMD, 200ns, 250Ω delay line with
standard pinout.
PART NUMBER CONSTRUCTION
1520(S)m - xxx - zzz p
MOUNTING HEIGHT CODE
See Table
DELAY TIME
Expressed in nanoseconds (ns)
First two digits are significant figures
Last digit specifies # of zeros to follow
IMPEDANCE
Expressed in nanoseconds (ns)
First two digits are significant figures
Last digit specifies # of zeros to follow
PINOUT CODE
See Table
Omit for STD pinout
SERIES SPECIFICATIONS
•
•
•
•
•
Dielectric breakdown:
Distortion @ output:
Operating temperature:
Storage temperature:
Temperature coefficient:
50 Vdc
10% max.
-55°C to +125°C
-55°C to +125°C
100 PPM/°C
T
D
(ns)
10
20
30
40
50
60
75
100
120
150
180
200
220
250
300
375
500
600
750
1000
DELAY SPECIFICATIONS
T
I
(ns)
1.0
2.0
3.0
4.0
5.0
6.0
7.5
10.0
12.0
15.0
18.0
20.0
22.0
25.0
30.0
37.5
50.0
60.0
75.0
100.0
T
R
(ns)
3.0
5.5
6.5
8.0
10.0
12.0
15.0
20.0
24.0
30.0
36.0
40.0
44.0
50.0
60.0
75.0
100.0
120.0
150.0
200.0
Z=50Ω
3
3
3
3
3
3
3
3
3
3
4
4
4
4
N/A
N/A
N/A
N/A
N/A
N/A
ATTENUATION (%) TYPICAL
Z=100Ω Z=200Ω Z=300Ω Z=500Ω
5
N/A
N/A
N/A
5
5
N/A
N/A
5
5
N/A
N/A
5
5
5
N/A
5
5
5
7
5
5
5
7
5
5
5
7
5
5
7
7
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
8
10
10
7
8
10
10
8
10
12
12
N/A
N/A
15
15
N/A
N/A
15
20
N/A
N/A
N/A
20
PINOUT CODES
CODE
STD
A
B
C
D
E
F
G
H
I
J
K
L
N
P
T
U
V
W
Z
IN
14
1
2
7
1
2
1
2
2
1
1
1
13
1
1
1
2
2
1
1
T1
2
2
3
9
13
3
13
13
3
13
2
2
12
2
13
2
3
3
13
13
T2
12
13
4
6
2
4
2
3
4
2
13
3
11
3
3
3
4
4
2
3
T3
3
3
5
10
12
5
12
12
12
12
3
4
10
4
12
4
5
5
12
12
T4
11
12
6
5
3
6
3
4
6
3
12
5
9
5
4
5
6
6
3
4
T5
4
4
7
11
11
7,8
11
11
7
11
4
6
7,8
6
11
6
8
8
11
11
T6
5
10
9
12
4
9
4
5
9
5
10
12
6
10
5
9
9
9
4
5
T7
10
5
10
3
10
10
10
10
10
10
5
11
5
11
10
10
10
10
10
10
T8
6
9
11
13
5
11
5
6
11
6
9
10
4
12
6
11
11
11
5
6
T9
9
6
12
2
9
12
9
9
12
9
6
9
3
13
9
12
12
12
9
9
T10
7
7
13
14
6
13
6
7
13
7
7
8
2
14
7
13
13
13
6
8
GND
1,8
14
1,14
1,8
7,8,14
1,14
7
8,14
1
8,14
8,14
7
1,14
7
8,14
7,14
1,7
1
7,14
7
Notes: T
I
represents nominal tap-to-tap delay increment
Tolerance on T
D
=
±5%
or
±2ns,
whichever is greater
Tolerance on T
I
=
±5%
or
±1ns,
whichever is greater
“N/A” indicates that delay is not available at this Z
2004
Data Delay Devices
Doc #97028
5/5/04
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
PCB Design
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