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LTC2261IUJ-14#PBF

Description
IC ADC 14-BIT 125MSPS 40-QFN
CategoryAnalog mixed-signal IC    converter   
File Size783KB,34 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance
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LTC2261IUJ-14#PBF Overview

IC ADC 14-BIT 125MSPS 40-QFN

LTC2261IUJ-14#PBF Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?conform to
Parts packaging codeQFN
package instructionHVQCCN, LCC40,.24SQ,20
Contacts40
Manufacturer packaging codeUJ
Reach Compliance Codecompliant
ECCN code3A991.C.3
Converter typeADC, PROPRIETARY METHOD
JESD-30 codeS-PQCC-N40
JESD-609 codee3
length6 mm
Maximum linear error (EL)0.0229%
Humidity sensitivity level1
Number of analog input channels1
Number of digits14
Number of functions1
Number of terminals40
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output bit codeOFFSET BINARY, 2'S COMPLEMENT BINARY
Output formatPARALLEL, WORD
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC40,.24SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply1.8 V
Certification statusNot Qualified
Sampling rate125 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height0.8 mm
Nominal supply voltage1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width6 mm
Base Number Matches1
LTC2261-14
LTC2260-14/LTC2259-14
14-Bit, 125/105/80Msps
Ultralow Power 1.8V ADCs
FeaTures
n
n
n
n
n
n
n
n
n
n
n
n
n
DescripTion
The
LTC
®
2261-14/LTC2260-14/LTC2259-14
are sam-
pling 14-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performance that includes 73.4dB SNR and 85dB spurious
free dynamic range (SFDR). Ultralow jitter of 0.17ps
RMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typi-
cal) and no missing codes over temperature. The transition
noise is a low 1.2LSB
RMS
.
The digital outputs can be either full-rate CMOS, double-
data rate CMOS, or double-data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC
+
and ENC
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
73.4dB SNR
85dB SFDR
Low Power: 127mW/106mW/89mW
Single 1.8V Supply
CMOS, DDR CMOS or DDR LVDS Outputs
Selectable Input Ranges: 1V
P-P
to 2V
P-P
800MHz Full-Power Bandwidth S/H
Optional Data Output Randomizer
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Serial SPI Port for Configuration
Pin Compatible 14-Bit and 12-Bit Versions
40-Pin (6mm
×
6mm) QFN Package
applicaTions
n
n
n
n
n
n
Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multi-Channel Data Acquisition
Nondestructive Testing
Typical applicaTion
2-Tone FFT, f
IN
= 70MHz and 75MHz
1.8V
V
DD
1.2V
TO 1.8V
OV
DD
AMPLITUDE (dBFS)
0
–10
–20
–30
–40
–50
–60
–70
–80
ANALOG
INPUT
+
INPUT
S/H
14-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D13
CMOS
OR
LVDS
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
125MHz
CLOCK
GND
226114 TA01a
–90
–100
–110
–120
0
10
20
30
40
FREQUENCY (MHz)
50
60
226114 TA01b
226114fc
For more information
www.linear.com/LTC2261-14
1

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