MOSEL VITELIC
V29C51001T/V29C51001B
1 MEGABIT (131,072 x 8 BIT)
5 VOLT CMOS FLASH MEMORY
Description
PRELIMINARY
Features
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128Kx8-bit Organization
Address Access Time: 45, 70, 90 ns
Single 5V
±
10% Power Supply
Sector Erase Mode Operation
8KB Boot Block (lockable)
512 bytes per Sector, 256 Sectors
– Sector-Erase Cycle Time: 10ms (Max)
– Byte-Program Cycle Time: 20
µ
s (Max)
Minimum 10,000 Erase-Program Cycles
Low power dissipation
– Active Read Current: 20mA (Typ)
– Active Program Current: 30mA (Typ)
– Standby Current: 100
µ
A (Max)
Hardware Data Protection
Low V
CC
Program Inhibit Below 2.5V
Self-timed program/erase operations with end-
of-cycle detection
– DATA Polling
– Toggle Bit
CMOS and TTL Interface
Available in two versions
– V29C51001T (Top Boot Block)
– V29C51001B (Bottom Boot Block)
Packages:
– 32-pin Plastic DIP
– 32-pin TSOP-I
– 32-pin PLCC
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The V29C51001T/V29C51001B is a high speed
131,072 x 8 bit CMOS flash memory. Programming
or erasing the device is done with a single 5 Volt
power supply. The device has separate chip enable
CE, program enable WE, and output enable OE
controls to eliminate bus contention.
The V29C51001T/V29C51001B offers a combi-
nation of features: Boot Block with Sector Erase
Mode. The end of program/erase cycle is detected
by DATA Polling of I/O
7
or by the Toggle Bit I/O
6
.
The V29C51001T/V29C51001B features a
sector erase operation which allows each sector to
be erased and reprogrammed without affecting
data stored in other sectors. The device also
supports full chip erase.
Boot block architecture enables the device to
boot from a protected sector loaded either at the
top (V29C51001T) or the bottom (V29C51001B)
sector. All inputs and outputs are CMOS and TTL
compatible.
The V29C51001T/V29C51001B is ideal for
applications that require updatable code and data
storage.
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Device Usage Chart
Operating
Temperature
Range
0
°
C to 70
°
C
Package Outline
P
•
T
•
J
•
45
•
Access Time (ns)
70
•
90
•
Power
Temperature
Mark
Blank
Std.
•
V29C51001T/V29C51001B Rev. 0.8 October 2000
1
MOSEL VITELIC
Functional Block Diagram
V29C51001T/V29C51001B
X-Decoder
1,048,576 Bit
Memory Cell Array
A
0
–A
16
Address buffer & latches
Y-Decoder
CE
OE
WE
Control Logic
I/O Buffer & Data Latches
I/O
0
–I/O
7
51001-05
Capacitance
(1,2)
Symbol
C
IN
C
OUT
C
IN2
Parameter
Input Capacitance
Output Capacitance
Control Pin Capacitance
Test mSetup
V
IN
= 0
V
OUT
= 0
V
IN
= 0
Typ.
6
8
8
Max.
8
12
10
Units
pF
pF
pF
NOTE:
1. Capacitance is sampled and not 100% tested.
2. T
A
= 25
°
C, V
CC
= 5V
±
10%, f = 1 MHz.
Latch Up Characteristics
(1)
Parameter
Input Voltage with Respect to GND on A
9
, OE
Input Voltage with Respect to GND on I/O, address or control pins
V
CC
Current
NOTE:
1. Includes all pins except V
CC
. Test conditions: V
CC
= 5V, one pin at a time.
Min.
-1
-1
-100
Max.
+13
V
CC
+ 1
+100
Unit
V
V
mA
AC Test Load
+5.0 V
IN3064
or Equivalent
Device Under
Test
IN3064 or Equivalent
C
L
= 100 pF
6.2 kΩ
IN3064 or Equivalent
IN3064 or Equivalent
51001-06
2.7 kΩ
V29C51001T/V29C51001B Rev. 0.8 October 2000
3
MOSEL VITELIC
Absolute Maximum Ratings
(1)
Symbol
V
IN
V
IN
V
CC
T
STG
T
OPR
I
OUT
V29C51001T/V29C51001B
Parameter
Input Voltage (input or I/O pins)
Input Voltage (A
9
pin, OE)
Power Supply Voltage
Storage Temperature (Plastic)
Operating Temperature
Short Circuit Current
(2)
Commercial
-2 to +7
-2 to +13
-0.5 to +5.5
-65 to +125
0 to +70
200 (Max.)
Unit
V
V
V
°
C
°
C
mA
NOTE:
1. Stress greater than those listed unders “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. No more than one output maybe shorted at a time and not exceeding one second long.
DC Electrical Characteristics
(over the commercial operating range)
Parameter
Name
V
IL
V
IH
I
IL
I
OL
V
OL
V
OH
I
CC1
Parameter
Input LOW Voltage
Input HIGH Voltage
Input Leakage Current
Output Leakage Current
Output LOW Voltage
Output HIGH Voltage
Read Current
Test Conditions
V
CC
= V
CC
Min.
V
CC
= V
CC
Max.
V
IN
= GND to V
CC
, V
CC
= V
CC
Max.
V
OUT
= GND to V
CC
, V
CC
= V
CC
Max.
V
CC
= V
CC
Min., I
OL
= 2.1mA
V
CC
= V
CC
Min, I
OH
= -400
µ
A
CE = OE = V
IL
, WE = V
IH
, all I/Os open,
Address input = V
IL
/V
IH
, at f = 1/t
RC
Min.,
V
CC
= V
CC
Max.
CE = WE = VIL, OE = V
IH
, V
CC
= V
CC
Max.
CE = OE = WE = V
IH
, V
CC
= V
CC
Max.
CE = OE = WE = V
CC
– 0.3V, V
CC
= V
CC
Max.
CE = OE = V
IL
, WE = V
IH
CE = OE = V
IL
, WE = V
IH
, A9 = V
H
Max.
Min.
—
2
—
—
—
2.4
—
Max.
0.8
—
±
1
±
1
0.4
—
40
Unit
V
V
µ
A
µ
A
V
V
mA
I
CC2
I
SB
I
SB1
V
H
I
H
Program Current
TTL Standby Current
CMOS Standby Current
Device ID Voltage for A
9
Device ID Current for A
9
—
—
—
11.5
—
50
2
150
12.5
50
mA
mA
µA
V
µA
V29C51001T/V29C51001B Rev. 0.8 October 2000
4
MOSEL VITELIC
AC Electrical Characteristics
(over all temperature ranges)
Read Cycle
Parameter
Name
t
RC
t
AA
t
CE
t
OE
t
CLZ
t
OLZ
t
DF
t
OH
V29C51001T/V29C51001B
-45
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
CE Low to Output Active
OE Low to Output Active
Output Enable or Chip Disable to Output
in High Z
Output Hold from Address Change
-70
Max.
—
45
45
25
—
—
15
-90
Max.
—
70
70
35
—
—
20
Min.
45
—
—
—
0
0
0
Min.
70
—
—
—
0
0
0
Min.
90
—
—
—
0
0
0
Max.
—
90
90
45
—
—
30
Unit
ns
ns
ns
ns
ns
ns
ns
0
—
0
—
0
—
ns
Program (Erase/Program) Cycle
Parameter
Name
t
WC
t
AS
t
AH
t
CS
t
CH
t
OES
t
OEH
t
WP
t
WPH
t
DS
t
DH
t
WHWH1
t
WHWH2
t
WHWH3
-45
Parameter
Program Cycle Time
Address Setup Time
Address Hold Time
CE Setup Time
CE Hold Time
OE Setup Time
OE High Hold Time
WE Pulse Width
WE Pulse Width High
Data Setup Time
Data Hold Time
Programming Cycle
Sector Erase Cycle
Chip Erase Cycle
-70
-90
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
45
0
35
0
0
0
0
25
20
20
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
—
—
—
—
—
—
—
—
—
—
—
20
10
—
70
0
45
0
0
0
0
35
35
25
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
—
—
—
—
—
—
—
—
—
—
—
20
10
—
90
0
45
0
0
0
0
45
38
30
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
—
—
—
—
—
—
—
—
—
—
—
20
10
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
sec
V29C51001T/V29C51001B Rev. 0.8 October 2000
5
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