A8586-2) and controlled switch node rise and fall times
• Ceramic capacitor stable
• Internal soft-start
• Overcurrent protection
FEATURES AND BENEFITS
DESCRIPTION
The A8586 is a high frequency step-down switching regulator
with an integrated high-side power MOSFET. It provides up
3.5 A output current. The A8586 can achieve fast transient
response using current-mode control and simple external
compensation.
The wide input range of 3.8 to 36 V makes the A8586 suitable
for a wide range of step-down applications, including those in
an automotive input environment. Battery-driven applications
benefit from the low 30 μA operational quiescent current.
The A8586 maintains high efficiency across a wide load range
by the use of pulse-frequency modulation (PFM) as the load
reduces. This in turn reduces switching and gate driver losses
at light load. A8586-1 and A8586-2 are options that disable
the PFM function. A8586-1 also disables the dithering feature.
These can be useful when low output ripple and minimum
output capacitance is required.
Frequency foldback helps to prevent inductor current runaway
during startup and provides enhanced dropout performance.
Extensive protection features of the A8586 include pulse-by-
pulse current limit, hiccup mode short-circuit protection, open/
short freewheeling diode protection, BOOT open/short voltage
protection, VIN undervoltage lockout, and thermal shutdown.
The A8586 and A8586-2 are designed to aid in EMC/EMI
design by including frequency dithering, soft freewheel diode
turn-off, and well controlled switch node slew rates. A 4 MHz
oscillator allows the A8586 to switch outside EMI sensitive
frequencies bands such as the AM band or ADSL bands.
The A8586 is available in industry-standard DFN-10 or SOIC-8
packages.
C
BST
• High-voltage power
conversion
• Automotive systems
• Industrial power system
APPLICATIONS
• Distributed power
systems
• Battery-powered systems
PACKAGES:
10-Pin DFN with Exposed
Thermal Pad (suffix EJ)
8-Pin SOIC with Exposed
Thermal Pad (suffix LJ)
Not to scale
L
O
Dither
Feature
Yes
No
Yes
PFM
Operation
Yes
No
No
VIN
BST
SW
VIN
EN
FB
COMP
VOUT
Part
A8586
A8586-1
A8586-2
R
FB1
D
R
FB2
C
OUT
C
Z
C
P
Optional
R
FREQ
A8586 Simplified Schematic
A8586-DS, Rev. 7
MCO-0000142
August 30, 2018
GND
C
IN
FREQ
A8586, A8586-1,
A8586-2
Wide Input Voltage, Adjustable Frequency,
3.5 Amp Buck Regulator
SPECIFICATIONS
SELECTION GUIDE
Part Number
A8586KLJTR-T
A8586KEJTR-T
A8586KLJTR-T-1
A8586KLJTR-T-2
[1]
Package
8-pin SOIC with thermal pad
10-pin DFN with thermal pad
8-pin SOIC with thermal pad
8-pin SOIC with thermal pad
Packing
[1]
3,000 pieces per 13-inch reel
1,500 pieces per 7-inch reel
3,000 pieces per 13-inch reel
3,000 pieces per 13-inch reel
Contact Allegro for additional packing options.
ABSOLUTE MAXIMUM RATINGS
[2]
Characteristic
Input Voltage
Switch Node Voltage
Bootstrap Pin to Switch Node
EN, FREQ
All other pins
Junction Temperature
Storage Temperature Range
[2]
Symbol
V
IN
V
SW
V
BST-SW
t < 250 ns
t < 50 ns
Notes
Rating
−0.3 to 40
−0.3 to V
IN
+ 0.3
−1.5
V
IN
+ 3
−0.3 to 6
−0.3 to V
IN
+ 0.3
−0.3 to 6
Unit
V
V
V
V
V
V
V
°C
°C
T
J
T
stg
−40 to 150
−40 to 150
Stresses beyond those listed in this table may cause permanent damage to the device. The absolute maximum ratings are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the Electrical Characteristics table is not implied. Exposure to absolute-maximum-rated conditions
for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Characteristic
Input Voltage
Junction Temperature
Symbol
V
IN
T
J
Test Conditions
Value
3.8 to 36
−40 to 150
Unit
V
°C
THERMAL CHARACTERISTICS
:
May require derating at maximum conditions; see application information
Characteristic
Junction-to-Ambient Thermal Resistance
[3]
Additional
Symbol
R
θJA
Test Conditions
[3]
DFN-10 (EJ) package on 4-layer PCB based on JEDEC standard
SOIC-8 (LJ) package on 4-layer PCB based on JEDEC standard
Value
45
35
Unit
°C/W
thermal information available on the Allegro website.
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
2
A8586, A8586-1,
A8586-2
Wide Input Voltage, Adjustable Frequency,
3.5 Amp Buck Regulator
Boot
Charge
VIN
VIN
EN
LDO
V
REG
BST
Dither
Generator
FREQ
FB
V
REG
Soft Start
Ramp
–
+
+
0.8 V
Osc
V
REG
PWM
Generator
–
+
BST
SW
SW
COMP
GND
Functional Block Diagram
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
3
A8586, A8586-1,
A8586-2
Wide Input Voltage, Adjustable Frequency,
3.5 Amp Buck Regulator
PINOUT DIAGRAMS AND TERMINAL LIST TABLE
SW
SW
EN
COMP
FB
1
2
3
4
5
PAD
10 BST
9
8
7
6
VIN
VIN
FREQ
GND
SW
EN
COMP
FB
1
2
PAD
3
4
8
7
6
5
BST
VIN
FREQ
GND
Package EJ Pinouts
Package LJ Pinouts
Terminal List Table
Pin
Name
SW
EN
COMP
FB
GND
FREQ
VIN
BST
Pin Number
EJ
Package
1, 2
3
4
5
6
7
8, 9
10
LJ
Package
1
2
3
4
5
6
7
8
Description
The source of the internal MOSFET. The output inductor (L
O
) and cathode of the freewheel diode (D) should be
connected to this pin. L
O
and D should be placed as close as possible to this pin and connected with relatively
wide traces.
Enable input. This pin is a high-voltage input that turns the regulator on or off: Set this pin high to turn the regulator
on or set this pin low to turn the regulator off.
Output of the error amplifier and compensation node for the current-mode control loop. Connect a series RC
network from this pin to GND for loop compensation. See the Applications section of this datasheet for further
details
Feedback (negative) input to the error amplifier. Connect a resistor divider from the regulator output node, VOUT,
to this pin to program the output voltage.
Ground connection
Frequency setting pin. A resistor, R
FREQ
, from this pin to GND sets the PWM switching frequency. See Table 1 and
Figure 2 to determine the value of R
FREQ
.
Power input for the control circuits and the drain of the internal high-side N-channel MOSFET. Connect this pin to a
power supply of 3.8 to 36 V. A high quality ceramic capacitor should be placed very close to this pin and GND
Bootstrap capacitor connection. Connect a 100 nF capacitor from this pin to the SW pin. The voltage on this
capacitor drives the internal MOSFET via the high side gate driver. A series BOOT resistor is not recommended.
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
4
A8586, A8586-1,
A8586-2
Wide Input Voltage, Adjustable Frequency,
3.5 Amp Buck Regulator
ELECTRICAL CHARACTERISTICS
[1]
: Valid for V
IN
= 12 V, V
EN
= 2.5 V, V
COMP
= 1.4 V, –40°C ≤ T
J
≤ 125°C,
typical values at T
J
= 25°C, unless otherwise specified
Characteristics
GENERAL SPECIFICATIONS
Operating Input Voltage
VIN UVLO Start
VIN UVLO Hysteresis
Supply Quiescent Current
[1]
PWM SWITCHING FREQUENCY
Switching Frequency
THERMAL PROTECTION
Thermal Shutdown Threshold
[2]
Thermal Shutdown Hysteresis
[2]
PULSE-WIDTH MODULATION (PWM)
Minimum On-Time
[2]
Minimum Off-Time
[2]
INTERNAL MOSFET
MOSFET On Resistance
MOSFET Leakage
[2]
ERROR AMPLIFIER
Feedback Voltage
Error Amp Voltage Gain
[2]
Error Amp Transconductance
[2]
Error Amp Min. Source Current
Error Amp Min. Sink Current
Low I
Q
Peak Current Threshold
SOFT-START
SS Ramp Time
[2]
CURRENT PROTECTION
Current Limit
COMP to Current Sense
Transductance
[2]
Slope Compensation
LOGIC ENABLE
EN Threshold Rising
EN Threshold Falling
EN Hysteresis
[1]
Symbol
V
IN
V
IN(START)
V
IN(HYS)
I
Q
I
Q(SLEEP)
f
SW
T
TSD
T
HYS
t
ON(MIN)
t
OFF(MIN)
R
DS(on)
I
FET(LKG)
V
EN
≥ 2.5 V
V
IN
rising
Test Conditions
Min.
3.8
2.6
–
Typ.
12
3.0
0.4
27
11
2.0
170
20
80
100
150
0.1
0.792
–
1000
60
–5
5
800
1.5
5.5
9
3.1
1.5
1.2
300
Max.
36
3.4
–
36
18
2.4
–
–
160
–
–
1
0.803
0.812
–
95
–
–
–
–
–
–
4.0
1.85
1.4
–
Unit
V
V
V
µA
µA
MHz
°C
°C
ns
ns
mΩ
µA
V
V
V/V
µA/V
µA
µA
mA
ms
A
A/V
A/µs
V
V
mV
No load, V
FB
= 0.9 V, A8586 only,
–40°C ≤ T
J
≤ 65°C
[2]
V
EN
= 0 V
R
FSET
= 45 kΩ
T
J
rising
–
–
1.6
–
–
–
–
V
BOOT-SW
= 5 V
V
EN
= 0 V, V
IN
= 12 V, V
SW
= 0 V, T
J
= 25°C
4.5 V ≤ V
IN
≤ 36 V, T
J
= 25°C
[2]
4.5 V ≤ V
IN
≤ 36 V, –40°C ≤ T
J
≤ 125°C
I
COMP
= ±3 µA
V
FB
= 0.7 V
V
FB
= 0.9 V
–
–
0.786
0.773
–
35
–
–
–
V
FB
A
VOL
g
m
I
EA(SOURCE)
I
EA(SINK)
I
PEAK(LO_IQ)
t
SS
I
LIM
G
CS
S
E(2MHz)
V
EN(H)
V
EN(L)
V
EN(HYS)
0 V < V
FB
< 0.8 V
–
4.0
–
Measured at f
SW
= 2 MHz
V
EN
rising
V
EN
falling
2.2
1.2
1.0
–
For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going into the node or
pin (sinking).
[2]
Ensured by design and characterization, not production tested.
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