(Notes 2, 3) ............................................ –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
*V
IN
has an internal 20V clamp
32 31 30 29 28 27 26 25
BAL 1
SCAP 2
V
IN2
3
UV3 4
UV2 5
UV1 6
UV0 7
AC1 8
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 44°C/W
EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3330EUH#PBF
LTC3330IUH#PBF
TAPE AND REEL
LTC3330EUH#TRPBF
LTC3330IUH#TRPBF
PART MARKING*
3330
3330
PACKAGE DESCRIPTION
32-Lead (5mm
×
5mm) Plastic QFN
32-Lead (5mm
×
5mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
V
IN3
2
3330fc
For more information
www.linear.com/LTC3330
LTC3330
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 5V, BAT = 3.6V, SCAP = OV, LDO_IN = 0V unless
otherwise specified.
SYMBOL
V
IN
V
BAT
I
VIN
PARAMETER
Buck Input Voltage Range
Buck-Boost Input Voltage Range
V
IN
Quiescent Current
V
IN
Input in UVLO
V
IN
Input in UVLO
Buck Enabled, Sleeping
Buck Enabled, Sleeping
Buck Enabled, Not Sleeping
BAT Quiescent Current
BAT Input with V
IN
Active
Buck-Boost Enabled, Sleeping
Buck-Boost Enabled, Not Sleeping
V
OUT
Leakage Current
V
IN
Undervoltage Lockout Thresholds
(Rising or Falling)
V
IN
= 2.5V, BAT = 0V
V
IN
= 16V, BAT = 0V
V
IN
= 4V, BAT = 0V
V
IN
= 18V, BAT = 0V
V
IN
= 5V, BAT = 0V, I
SW1
= 0A (Note 4)
BAT = 1.8V, V
IN
= 5V
BAT = 5V, V
IN
= 0V
BAT = 5V, V
IN
= 0V, I
SWA
= I
SWB
= 0A
(Note 4)
V
OUT
= 5.0V, OUT[2:0] = 111, Sleeping
3V Level
4V Level
5V Level
6V Level
7V Level
8V Level
9V Level
10V Level
11V Level
12V Level
13V Level
14V Level
15V Level
16V Level
17V Level
18V Level
V
SHUNT
I
SHUNT
V
IN
Shunt Regulator Voltage
Maximum Protective Shunt Current
Internal Bridge Rectifier Loss (|V
AC1
– V
AC2
| – V
IN
) I
BRIDGE
= 10µA
I
BRIDGE
= 50mA
Internal Bridge Rectifier Reverse Leakage Current
Internal Bridge Rectifier Reverse Breakdown
Voltage
V
REVERSE
= 18V
I
REVERSE
= 1µA
V
SHUNT
30
I
VIN
= 1mA
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
l
l
MIN
1.8
TYP
MAX
19
5.5
UNITS
V
V
nA
nA
nA
nA
µA
nA
nA
µA
nA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mV
mV
nA
V
450
840
1200
1800
150
–10
0
750
200
100
2.91
3.88
4.85
5.82
6.79
7.76
8.73
9.70
10.67
11.64
12.61
13.58
14.55
15.52
16.49
17.46
19.0
25
700
1350
800
1550
3.00
4.00
5.00
6.00
7.00
8.00
9.00
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
18.0
20.0
700
1400
1800
2500
225
10
1200
300
150
3.09
4.12
5.15
6.18
7.21
8.24
9.27
10.30
11.33
12.36
13.39
14.42
15.45
16.48
17.51
18.54
21.0
900
1750
20
I
BAT
I
VOUT
V
INUVLO
3330fc
For more information
www.linear.com/LTC3330
3
LTC3330
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 5V, BAT = 3.6V, SCAP = OV, LDO_IN = 0V unless
otherwise specified.
SYMBOL
V
OUT
PARAMETER
Regulated Buck/Buck-Boost Output Voltage
CONDITIONS
1.8V Output Selected
Sleep Threshold
Wake-Up Threshold
2.5V Output Selected
Sleep Threshold
Wake-Up Threshold
2.8V Output Selected
Sleep Threshold
Wake-Up Threshold
3.0V Output Selected
Sleep Threshold
Wake-Up Threshold
3.3V Output Selected
Sleep Threshold
Wake-Up Threshold
3.6V Output Selected
Sleep Threshold
Wake-Up Threshold
4.5V Output Selected
Sleep Threshold
Wake-Up Threshold
5.0V Output Selected
Sleep Threshold
Wake-Up Threshold
PGVOUT Falling Threshold
I
PEAK_BUCK
Buck Peak Switch Current
I
BUCK
I
PEAK_BB
Available Buck Output Current
Buck-Boost Peak Switch Current
250mA Target Selected
150mA Target Selected
100mA Target Selected
50mA Target Selected
25mA Target Selected
15mA Target Selected
10mA Target Selected
5mA Target Selected
I
BB
R
P_BUCK
R
N_BUCK
R
P_BB
Available Buck-Boost Current
Buck PMOS Switch On-Resistance
Buck NMOS Switch On-Resistance
Buck-Boost PMOS Input and Output Switch
On-Resistance
IPK[2:0] = 111
IPK[2:0] = 110
IPK[2:0] = 101
IPK[2:0] = 100
IPK[2:0] = 011
IPK[2:0] = 010
IPK[2:0] = 001
IPK[2:0] = 000
I
PEAK_BB
= 250mA, BAT = 1.8V,
V
OUT
= 3.3V
As a Percentage of V
OUT
Target (Note 5)
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
MIN
TYP
1.806
1.794
2.508
2.492
2.809
2.791
3.010
2.990
3.311
3.289
3.612
3.588
4.515
4.485
5.017
4.983
92
250
250
150
100
50
25
15
10
5
MAX
1.872
UNITS
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
%
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
1.728
2.425
2.575
2.716
2.884
2.910
3.090
3.200
3.400
3.492
3.708
4.365
4.635
4.850
88
200
100
200
120
80
40
20
12
8
4
50
5.150
96
350
350
210
140
70
35
21
14
7
1.4
1.2
0.7
0.9
1.2
2.1
3.9
6.3
9.2
17.7
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
4
3330fc
For more information
www.linear.com/LTC3330
LTC3330
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 5V, BAT = 3.6V, SCAP = OV, LDO_IN = 0V unless
otherwise specified.
SYMBOL
R
N_BB
I
LEAK(P)
I
LEAK(N)
V
LDO_IN
I
LDO_IN
I
LDO_OUT
LDO_OUT
PARAMETER
Buck-Boost NMOS Input and Output Switch
On-Resistance
PMOS Switch Leakage
NMOS Switch Leakage
Maximum Buck Duty Cycle
LDO_IN Input Range
LDO_IN Quiescent Current
LDO_OUT Leakage Current
Regulated LDO Output Voltage
LDO Line Regulation (1.8V to 5.5V)
LDO Load Regulation (10µA to 10mA)
LDO Dropout Voltage
R
P_LDO
LDO PMOS Switch On-Resistance
LDO Current Limit
PGLDO Rising Threshold
PGLDO Falling Threshold
V
SCAP
I
SCAP
I
SOURCE
I
SINK
V
BAL
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
Supercapacitor Balancer Input Range
Supercapacitor Balancer Quiescent Current
Supercapacitor Balancer Source Current
Supercapacitor Balancer Sink Current
Supercapacitor Balance Point
Digital Input High Voltage
Digital Input Low Voltage
Digital Input High Current
Digital Input Low Current
PGVOUT, PGLDO Output High Voltage
EH_ON Output High Voltage
PGVOUT, PGLDO, EH_ON Output Low Voltage
SCAP = 5.0V
SCAP = 5.0V, BAL = 2.4V
SCAP = 5.0V, BAL = 2.6V
Percentage of SCAP Voltage
Pins LDO_EN, OUT[2:0], LDO[2:0],
IPK[2:0], UV[3:0]
Pins LDO_EN, OUT[2:0], LDO[2:0],
IPK[2:0], UV[3:0]
Pins LDO_EN, OUT[2:0], LDO[2:0],
IPK[2:0], UV[3:0]
Pins LDO_EN, OUT[2:0], LDO[2:0],
IPK[2:0], UV[3:0]
BAT = 5V, 1µA Out of Pin
V
IN
= 6V, 1µA Out of Pin
BAT = 5V, 1µA into Pin
l
l
l
l
l
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
IPK2 = 1
IPK2 = 0
Buck/Buck-Boost Regulators
Buck/Buck-Boost Regulators
Buck/Buck-Boost Regulators
LDO_IN = 5.0V, I
LDO_OUT
= 0mA
LDO_OUT = 3.3V, LDO[2:0] = 110
Error as a Percentage of Target, 100µA
Load
LDO_OUT = 1.2V, 10mA Load
LDO_IN = 5.0V, LDO_OUT = 3.3V
LDO_OUT = 3.3V, 10mA LOAD
LDO_IN = 3.3V, I
LDO_OUT
= 10mA
LDO_IN = 5.0V
As a Percentage of the 3.3V LDO_OUT
Target
As a Percentage of the 3.3V LDO_OUT
Target
l
l
l
l
l
l
MIN
TYP
0.6
3.8
MAX
UNITS
Ω
Ω
–20
–20
100
1.8V
400
100
–2.0
–3.0
2
0.5
50
5
50
88
86
2.5
150
10
10
49
1.2
50
92
90
20
20
5.5V
600
150
2.0
3.0
nA
nA
%
V
nA
nA
%
%
mV/V
mV/mA
mV
Ω
mA
96
94
5.5
225
%
%
V
nA
mA
mA
51
%
V
0.4
0
0
4.0
3.8
0.4
10
10
V
nA
nA
V
V
V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3330E is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTC3330E is guaranteed to meet specifications from 0°C to
85°C. The LTC3330I is guaranteed over the –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
Note 3:
T
J
is calculated from the ambient T
A
and power dissipation PD
according to the following formula: T
J
= T
A
+ (P
D
•
θ
JA
).
Note 4:
Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
Note 5:
The PGVOUT Rising threshold is equal to the sleep threshold. See
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