LTC1562
Very Low Noise, Low Distortion
Active RC Quad Universal Filter
FEATURES
s
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DESCRIPTIO
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Continuous Time—No Clock
Four 2nd Order Filter Sections, 10kHz to 150kHz
Center Frequency
±0.5%
Typical Center Frequency Accuracy
±0.3%
Typical Center Frequency Accuracy (A Grade)
Wide Variety of Response Shapes
Lowpass, Bandpass and Highpass Responses
103dB Typical S/N,
±5V
Supply (Q = 1)
97dB Typical S/N, Single 5V Supply (Q = 1)
96dB Typical S/(N + THD) at
±5V
Supply, 20kHz Input
Rail-to-Rail Input and Output Voltages
DC Accurate to 3mV (Typ)
“Zero-Power” Shutdown Mode
Single or Dual Supply, 5V to 10V Total
Resistor-Programmable f
O
, Q, Gain
The LTC
®
1562 is a low noise, low distortion continuous-time
filter with rail-to-rail inputs and outputs, optimized for a
center frequency (f
O
) of 10kHz to 150kHz. Unlike most
monolithic filters, no clock is needed. Four independent 2nd
order filter blocks can be cascaded in any combination, such
as one 8th order or two 4th order filters. Each block’s
response is programmed with three external resistors for
center frequency, Q and gain, using simple design formulas.
Each 2nd order block provides lowpass and bandpass out-
puts. Highpass response is available if an external capacitor
replaces one of the resistors. Allpass, notch and elliptic
responses can also be realized.
The LTC1562 is designed for applications where dynamic
range is important. For example, by cascading 2nd order
sections in pairs, the user can configure the IC as a dual 4th
order Butterworth lowpass filter with 94dB signal-to-noise
ratio from a single 5V power supply. Low level signals can
exploit the built-in gain capability of the LTC1562. Varying the
gain of a section can achieve a dynamic range as high as
118dB with a
±5V
supply.
Other cutoff frequency ranges can be provided upon request.
Please contact LTC Marketing.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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High Resolution Systems (14 Bits to 18 Bits)
Antialiasing/Reconstruction Filters
Data Communications, Equalizers
Dual or I-and-Q Channels (Two Matched 4th Order
Filters in One Package)
Linear Phase Filtering
Replacing LC Filter Modules
TYPICAL APPLICATIO
R
IN1
10k
V
IN2
R
Q1
, 5.62k
R21, 10k
5V
0.1µF
R23, 10k
R
IN3
10k
V
IN1
R
IN2
, 10k
1
2
3
5
6
8
9
R
Q3
, 5.62k
10
INV B
V1 B
V2 B
V
+
LTC1562
SHDN
V2 A
V1 A
INV A
Dual 4th Order 100kHz Butterworth Lowpass Filter
INV C
V1 C
V2 C
V
–
20
19 R
Q2
, 13k
GAIN (dB)
18 R22, 10k
16
15
13
12 R24, 10k
11
R
Q4
, 13k
1562 TA01
V
OUT2
–5V
0.1µF
V
OUT1
SCHEMATIC INCLUDES PIN
NUMBERS FOR 20-PIN PACKAGE.
PINS 4, 7, 14, 17 (NOT SHOWN)
ALSO CONNECT TO V
–
SEE TYPICAL APPLICATIONS
FOR OTHER CUTOFF FREQUENCIES
DC ACCURATE, NONINVERTING,
UNITY-GAIN, RAIL-TO-RAIL
INPUT AND OUTPUTS. PEAK
SNR
≈
100dB WITH
±5V
SUPPLIES
AGND
V2 D
V1 D
INV D
R
IN4
, 10k
U
Amplitude Response
10
0
–10
–20
–30
–40
–50
–60
–70
–80
10k
100k
FREQUENCY (Hz)
1M
1562 TA03b
U
U
1562fa
1
LTC1562
PACKAGE/ORDER INFORMATION
ABSOLUTE
AXI U
RATI GS
(Note 1)
Total Supply Voltage (V
+
to V
–
) .............................. 11V
Maximum Input Voltage
at Any Pin ....................(V
–
– 0.3V)
≤
V
≤
(V
+
+ 0.3V)
Storage Temperature Range ................. – 65°C to 150°C
Operating Temperature Range
LTC1562C ............................................... 0°C to 70°C
LTC1562I ............................................ – 40°C to 85°C
Lead Temperature (Soldering, 10 sec).................. 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
INV B
V1 B
V2 B
V
–*
V
+
SHDN
V
–*
V2 A
V1 A
INV A
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
INV C
V1 C
V2 C
V
–*
V
–
AGND
V
–*
V2 D
V1 D
INV D
ORDER PART
NUMBER
INV B
1
2
3
4
5
6
7
8
TOP VIEW
16 INV C
15 V1 C
14 V2 C
13 V
–
12 AGND
11 V2 D
10 V1 D
9
N PACKAGE
16-LEAD PDIP
T
JMAX
= 150°C,
θ
JA
= 90°C/W
ORDER PART
NUMBER
LTC1562CN
LTC1562CG
LTC1562ACG
LTC1562IG
LTC1562AIG
V1 B
V2 B
V
+
SHDN
V2 A
V1 A
INV A
G PACKAGE
20-LEAD PLASTIC SSOP
*G PACKAGE PINS 4, 7, 14, 17 ARE
SUBSTRATE/SHIELD CONNECTIONS
AND MUST BE TIED TO V
–
INV D
T
JMAX
= 150°C,
θ
JA
= 136°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
S
I
S
PARAMETER
Total Supply Voltage
Supply Current
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
=
±5V,
outputs unloaded, SHDN pin to logic “low”,
unless otherwise noted. AC specs are for a single 2nd order section, R
IN
= R2 = R
Q
=10k
±0.1%,
f
O
= 100kHz, unless noted.
CONDITIONS
V
S
=
±2.375V,
R
L
= 5k, C
L
= 30pF, Outputs at 0V
V
S
=
±5V,
R
L
= 5k, C
L
= 30pF, Outputs at 0V
V
S
=
±2.375V,
R
L
= 5k, C
L
= 30pF, Outputs at 0V
V
S
=
±5V,
R
L
= 5k, C
L
= 30pF, Outputs at 0V
Output Voltage Swing
V
S
=
±2.375V,
R
L
= 5k, C
L
= 30pF
V
S
=
±5V,
R
L
= 5k, C
L
= 30pF
V
S
=
±2.375V,
Input at AGND Voltage
V
S
=
±5V,
Input at AGND Voltage
V
S
= Single 5V Supply
V
S
=
±5V,
V2 Output Has R
L
= 5k, C
L
= 30pF
V
S
=
±5V,
V2 Output Has R
L
= 5k, C
L
= 30pF
V
S
=
±5V,
V2 Output Has R
L
= 5k, C
L
= 30pF
V
S
=
±2.375V,
f
IN
= 10kHz,
V2 Output Has R
L
= 5k, C
L
= 30pF
V
S
=
±2.375V,
f
IN
= f
O
,
V2 Output Has R
L
= 5k, C
L
= 30pF
q
q
q
q
q
q
q
q
MIN
4.75
TYP
17.3
19
MAX
10.5
19.5
21.5
23.5
25.5
UNITS
V
mA
mA
mA
mA
V
P-P
V
P-P
4.0
9.3
4.6
9.8
3
3
2.5
0.5
0.3
0.6
1.0
0.6
1.5
+ 0.1
+ 0.5
15
15
V
OS
DC Offset Magnitude, V2 Outputs
(Lowpass Response)
DC AGND Reference Point
Center Frequency (f
O
) Error (Note 2)
LTC1562 (SSOP)
LTC1562A (SSOP)
LTC1562 (PDIP)
H
L
H
B
LP Passband Gain (V2 Output)
BP Passband Gain (V1 Output)
0
+ 0.05
+ 0.2
1562fa
2
U
W
U
U
U
W
W W
U
W
mV
mV
V
%
%
%
dB
dB
LTC1562
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Q Error
Wideband Output Noise,
Lowpass Response (V2 Output)
Input-Referred Noise, Gain = 100
THD
Total Harmonic Distortion,
Lowpass Response (V2 Output)
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
=
±5V,
outputs unloaded, SHDN pin to logic “low”,
unless otherwise noted. AC specs are for a single 2nd order section, R
IN
= R2 = R
Q
=10k
±0.1%,
f
O
= 100kHz, unless noted.
CONDITIONS
V
S
=
±2.375V,
LP Output Has R
L
= 5k, C
L
= 30pF
V
S
=
±2.375V,
BW = 200kHz, Input AC GND
V
S
=
±5V,
BW = 200kHz, Input AC GND
BW = 200kHz, f
O
= 100kHz, Q = 1, Input AC GND
f
IN
= 20kHz, 2.8V
P-P
, V1 and V2 Outputs Have
R
L
= 5k, C
L
= 30pF
f
IN
= 100kHz, 2.8V
P-P
, V1 and V2 Outputs Have
R
L
= 5k, C
L
= 30pF
Shutdown Supply Current
Shutdown-Input Logic Threshold
Shutdown-Input Bias Current
Shutdown Delay
Shutdown Recovery Delay
Inverting Input Bias Current, Each Biquad
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
SHDN Pin to 0V
SHDN Pin Steps from 0V to V
+
SHDN Pin Steps from V
+
to 0V
SHDN Pin to V
+
SHDN Pin to V
+
, V
S
=
±2.375V
MIN
TYP
+3
24
24
4.5
– 96
– 78
1.5
1.0
2.5
– 10
20
100
5
Note 2:
f
O
change from
±5V
to
±2.375
supplies is – 0.15% typical,
f
O
temperature coefficient, – 40°C to 85°C, is –25ppm/°C typical.
– 20
15
MAX
UNITS
%
µV
RMS
µV
RMS
µV
RMS
dB
dB
µA
µA
V
µA
µs
µs
pA
TYPICAL PERFOR A CE CHARACTERISTICS
f
O
Error vs Nominal f
O
(V
S
=
±5V)
1.50
1.25
1.00
0.75
f
O
ERROR (%)
f
O
ERROR (%)
Q ERROR (%)
0.50
0.25
0
– 0.25
– 0.50
– 0.75
–1.00
–1.25
–1.50
Q = 2.5
Q=1
50 60 70 80 90 100 110 120 130 140 150
NOMINAL f
O
(kHz)
1562 G01
U W
Q=5
f
O
Error vs Nominal f
O
(V
S
=
±2.5V)
1.50
1.25
1.00
0.75
0.50
0.25
0
– 0.25
– 0.50
– 0.75
–1.00
–1.25
–1.50
–5
35
30
Q Error vs Nominal f
O
(V
S
=
±5V)
T
A
= 70°C
T
A
= 25°C
R
IN
= R
Q
25
Q = 10
20
15
10
5
0
Q=1
50 60 70 80 90 100 110 120 130 140 150
NOMINAL f
O
(kHz)
1562 G03
Q=5
Q = 2.5
Q=5
Q=1
Q = 2.5
50 60 70 80 90 100 110 120 130 140 150
NOMINAL f
O
(kHz)
1562 G02
1562fa
3
LTC1562
TYPICAL PERFOR A CE CHARACTERISTICS
Q Error vs Nominal f
O
(V
S
=
±2.5V)
35
30
25
Q ERROR (%)
3.0
T
A
= 70°C
T
A
= 25°C
R
IN
= R
Q
Q = 10
PEAK BP GAIN (dB)
20
15
10
5
0
–5
Q=5
PEAK BP GAIN (dB)
50 60 70 80 90 100 110 120 130 140 150
NOMINAL f
O
(kHz)
1562 G04
LP Noise vs Nominal f
O
(V
S
=
±5V,
25°C) (Figure 3,
V2 Output) (R
IN
= R2)
60
55
50
BP NOISE (µV
RMS
)
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
45
NOISE (µV
RMS
)
40
35
30
25
20
15
10
60
70
80
Q=5
Q = 2.5
Q=1
90 100 110 120 130 140
NOMINAL f
O
(kHz)
1562 G07
PI FU CTIO S
Power Supply Pins:
The V
+
and V
–
pins should be
bypassed with 0.1µF capacitors to an adequate analog
ground or ground plane. These capacitors should be
connected as closely as possible to the supply pins. In the
20-lead SSOP package, the additional pins 4, 7, 14 and 17
are internally connected to V
–
(Pin 16) and should also be
tied to the same point as Pin 16 for best shielding. Low
noise linear supplies are recommended. Switching sup-
plies are not recommended as they will lower the filter
dynamic range.
Analog Ground (AGND):
The AGND pin is the midpoint of
an internal resistive voltage divider, developing a potential
halfway between the V
+
and V
–
pins, with an equivalent
series resistance nominally 7kΩ. This serves as an inter-
nal ground reference. Filter performance will reflect the
quality of the analog signal ground and an analog ground
plane surrounding the package is recommended. The
analog ground plane should be connected to any digital
ground at a single point. For dual supply operation, the
AGND pin should be connected to the ground plane
1562fa
4
U W
Q = 2.5
Q=1
Peak BP Gain vs Nominal f
O
(V
S
=
±5V)
(Figure 3, V1 Output)
3.0
T
A
= 70°C
T
A
= 25°C
R
IN
= R
Q
Q = 10
2.5
2.0
1.5
1.0
0.5
0
– 0.5
2.5
2.0
1.5
Q=5
1.0
Q = 2.5
0.5
0
– 0.5
50 60 70 80 90 100 110 120 130 140 150
NOMINAL f
O
(kHz)
1562 G5
Peak BP Gain vs Nominal f
O
(V
S
=
±2.5V)
(Figure 3, V1 Output)
T
A
= 70°C
T
A
= 25°C
R
IN
= R
Q
Q = 10
Q=5
Q = 2.5
Q=1
Q=1
50 60 70 80 90 100 110 120 130 140 150
NOMINAL f
O
(kHz)
1562 G6
BP Noise vs Nominal f
O
(V
S
=
±5V,
25°C) (Figure 3,
V1 Output) (R
IN
= R
Q
)
60
55
50
45
40
35
30
25
20
15
10
60
70
80
90 100 110 120 130 140
NOMINAL f
O
(kHz)
1562 G08
Distortion vs External Load
Resistance (V
S
=
±5V,
25°C)
(Figure 8)
0
–10
–20
–30
– 40
– 50
– 60
–70
– 80
– 90
f
IN
= 50kHz
f
IN
= 20kHz
2k
5k
EXTERNAL LOAD RESISTANCE (Ω)
1k
1562 G09
Q=5
2nd ORDER LOWPASS
f
O
= 100kHz
Q = 0.7
OUTPUT LEVEL 1V
RMS
(2.83V
P-P
)
±
5V SUPPLIES
Q = 2.5
Q=1
–100
10k
U
U
U
LTC1562
PIN FUNCTIONS
(Figure 1). For single supply operation, the AGND pin
should be bypassed to the ground plane with at least a
0.1µF capacitor (at least 1µF for best AC performance)
(Figure 2). These figures show 20-pin package connec-
tions. The same principles apply to the 16-pin package
with allowance for its different pin numbers. The 16-pin
ANALOG
GROUND
PLANE
1
2
3
4
V
+
0.1µF
5
6
7
8
9
10
LTC1562
20-PIN SSOP
20
19
18
17
16
15
14
13
12
11
V
–
0.1µF
SINGLE-POINT
SYSTEM GROUND
Figure 1. Dual Supply Ground Plane Connection
(Including Substrate Pins 4, 7, 14, 17)
ANALOG
GROUND
PLANE
2
3
4
19
17
LTC1562
20-PIN SSOP
16
15
14
13
12
11
V
+
/2
REFERENCE
1µF
V
+
0.1µF
5
6
7
8
9
10
V2
R2
INV
Z
IN
+
–
V
IN
SINGLE-POINT
SYSTEM GROUND
DIGITAL
GROUND PLANE
(IF ANY)
1562 F01
RESPONSE RESPONSE
Z
IN
TYPE
AT V1
AT V2
R
BANDPASS LOWPASS
C
HIGHPASS BANDPASS
Figure 2. Single Supply Ground Plane Connection
(Including Substrate Pins 4, 7, 14, 17)
Figure 3. Equivalent Circuit of a Single 2nd Order Section
(Inside Dashed Line) Shown in Typical Connection. Form of Z
IN
Determines Response Types at the Two Outputs (See Table)
1562fa
+
18
–
1
U
U
U
package does not have the four substrate pins (Pins 4, 7,
14, 17 in the 20-pin package).
Shutdown (SHDN):
When the SHDN input goes high or is
open-circuited, the LTC1562 enters a “zero-power” shut-
down state and only junction leakage currents flow. The
AGND pin and the amplifier outputs (see Figure 3) assume
a high impedance state and the amplifiers effectively
disappear from the circuit. (If an input signal is applied to
a complete filter circuit while the LTC1562 is in shutdown,
some signal will normally flow to the output through
passive components around the inactive op amps.)
A small pull-up current source at the SHDN input
defaults
the LTC1562 to the shutdown state if the SHDN pin is left
floating.
Therefore, the user
must
connect the SHDN pin
to a logic “low” (0V for
±5V
supplies, V
–
for 5V total
supply) for normal operation of the LTC1562. (This con-
vention permits true “zero-power” shutdown since not
even the driving logic must deliver current while the part
is in shutdown.) With a single supply voltage, use V
–
for
logic “low”— do not connect SHDN to the AGND pin.
DIGITAL
GROUND PLANE
(IF ANY)
1562 F01
1/4 LTC1562
1
sR1C*
*R1 AND C ARE PRECISION
INTERNAL COMPONENTS
C
20
R
Q
V1
1562 F01
IN EACH CASE,
f
O
= (100kHz)
Q = RQ 100kHz
R2
f
O
( )
(
10kΩ
R2
)
5
Microcontroller MCU
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