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FDD9510L-F085

Description
MOSFET P-CH 35V 13A DPAK
Categorysemiconductor    Discrete semiconductor   
File Size244KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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FDD9510L-F085 Overview

MOSFET P-CH 35V 13A DPAK

FDD9510L-F085 Parametric

Parameter NameAttribute value
FET type-
technology-
Current - Continuous Drain (Id) at 25°C-
Drive voltage (maximum Rds On, minimum Rds On)-
Rds On (maximum value) when different Id, Vgs-
Vgs (th) (maximum value) when different Id-
Vgs (maximum value)-
FET function-
Power dissipation (maximum)-
Operating temperature-
Installation type-
Supplier device packaging-
Package/casing-
FDD9510L-F085
P-Channel Logic Level
PowerTrench
)
MOSFET
−40
V,
−50
A, 13.5 mW
Features
Typ R
DS(on)
= 11 mW at V
GS
=
−10
V; I
D
=
−50
A
Typ Q
g(tot)
= 28 nC at V
GS
=
−10
V; I
D
=
−50
A
UIS Capability
Qualified to AEC Q101
These Devices are Pb−Free and are RoHS Compliant
Automotive Engine Control
Powertrain Management
Solenoid and Motor Drivers
Electrical Power Steering
Integrated Starter/Alternator
Distributed Power Architectures and VRM
Primary Switch for 12 V Systems
G
www.onsemi.com
Applications
DPAK
TO−252
CASE 369AS
D
ABSOLUTE MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Rating
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Continuous
(V
GS
=
−10
V) (T
C
= 25°C) (Note 1)
Pulsed Drain Current (T
C
= 25°C)
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
Derate above 25°C
Operating and Storage Temperature
Range
Thermal Resistance (Junction to Case)
Maximum Thermal Resistance
(Junction to Ambient) (Note 3)
Symbol
V
DSS
V
GS
I
D
I
D
E
AS
P
D
P
D
T
J
, T
STG
R
qJC
R
qJA
Value
−40
±16
−50
See
Figure 4
35.3
75
0.5
−55
to
+175
2
52
Unit
V
V
A
A
mJ
W
W/°C
°C
°C/W
°C/W
S
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by wirebond configuration
2. Starting Tj = 25°C, L = 40
mH,
I
AS
=
−42
A, V
DD
=
−40
V during inductor
charging and V
DD
= 0 V during time in avalanche
3. R
qJA
is the sum of the junction−to−case and case−to−ambient thermal
resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
qJC
is guaranteed by design while R
qJA
is determined by the user’s board design. The maximum rating presented
here is based on mounting on a 1 in
2
pad of 2 oz copper.
©
Semiconductor Components Industries, LLC, 2018
April, 2018
Rev. 0
1
Publication Order Number:
FDD9510L−F085/D
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