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74AC174PC

Description
IC FF D-TYPE SNGL 6BIT 16DIP
Categorysemiconductor    logic   
File Size99KB,9 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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74AC174PC Overview

IC FF D-TYPE SNGL 6BIT 16DIP

74AC174PC Parametric

Parameter NameAttribute value
Functionmaster reset
typeD type
Output typenon-inverting
Number of components1
bits per component6
Clock frequency125MHz
Maximum propagation delay at different V, maximum CL8.5ns @ 5V,50pF
Trigger typepositive edge
Current - output high, low24mA,24mA
Voltage - Power2 V ~ 6 V
Current - static (Iq)40µA
Input capacitance4.5pF
Operating temperature-40°C ~ 85°C(TA)
Installation typeThrough hole
Package/casing16-DIP(0.300",7.62mm)
74AC174 • 74ACT174 Hex D-Type Flip-Flop with Master Reset
November 1988
Revised October 2000
74AC174 • 74ACT174
Hex D-Type Flip-Flop with Master Reset
General Description
The AC/ACT174 is a high-speed hex D-type flip-flop. The
device is used primarily as a 6-bit edge-triggered storage
register. The information on the D inputs is transferred to
storage during the LOW-to-HIGH clock transition. The
device has a Master Reset to simultaneously clear all flip-
flops.
Features
s
I
CC
reduced by 50%
s
Outputs source/sink 24 mA
s
ACT174 has TTL-compatible inputs
Ordering Code:
Order Number
74AC174SC
74AC174SJ
74AC174MTC
74AC174PC
74ACT174SC
74ACT174SJ
74ACT174MTC
74ACT174PC
Package Number
M16A
M16D
MTC16
N16E
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D
0
–D
5
CP
MR
Q
0
–Q
5
Description
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
FACT is a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS009935
www.fairchildsemi.com
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