DM74LS393 Dual 4-Bit Binary Counter
August 1986
Revised March 2002
DM74LS393
Dual 4-Bit Binary Counter
General Description
Each of these monolithic circuits contains eight master-
slave flip-flops and additional gating to implement two indi-
vidual four-bit counters in a single package. The
DM74LS393 comprises two independent four-bit binary
counters each having a clear and a clock input. N-bit binary
counters can be implemented with each package providing
the capability of divide-by-256. The DM74LS393 has paral-
lel outputs from each counter stage so that any submultiple
of the input count frequency is available for system-timing
signals.
Features
s
Dual version of the popular DM74LS93
s
DM74LS393 dual 4-bit binary counter with individual
clocks
s
Direct clear for each 4-bit counter
s
Dual 4-bit versions can significantly improve system
densities by reducing counter package count by 50%
s
Typical maximum count frequency 35 MHz
s
Buffered outputs reduce possibility of collector commu-
tation
Ordering Code:
Order Number
DM74LS393M
DM74LS393N
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Counter Sequence (Each Counter)
Count
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
H
=
HIGH Logic Level
L
=
LOW Logic Level
Outputs
Q
D
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
Q
C
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
Q
B
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
Q
A
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
© 2002 Fairchild Semiconductor Corporation
DS006434
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DM74LS393
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Clear
A
Operating Free Air Temperature Range
Storage Temperature Range
7V
5.5V
0
°
C to
+
70
°
C
7V
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
−
65
°
C to
+
150
°
C
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
t
REL
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 2)
Clock Frequency (Note 3)
Pulse Width (Note 5)
A
Clear HIGH
Clear Release Time (Note 4)(Note 5)
Free Air Operating Temperature
0
0
20
20
25
↓
0
70
Parameter
Min
4.75
2
0.8
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
ns
ns
−
0.4
8
25
20
°
C
Note 2:
C
L
=
15 pF, R
L
=
2 kΩ, T
A
=
25°C and V
CC
=
5V.
Note 3:
C
L
=
50 pF, R
L
=
2 kΩ, T
A
=
25°C and V
CC
=
5V.
Note 4:
The symbol (↓) indicates that the falling edge of the clear pulse is used for reference.
Note 5:
T
A
=
25°C, and V
CC
=
5V.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CC
Input Current @ Max
Input Voltage
HIGH Level
Input Current
LOW Level
Input Current
Short Circuit Output Current
Supply Current
V
CC
=
Max (Note 7)
V
CC
=
Max (Note 8)
V
CC
=
Max, V
I
=
0.4V
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max, V
I
=
7V
V
CC
=
Max, V
I
=
5.5V
V
CC
=
Max, V
I
=
2.7V
Clear
A
Clear
A
Clear
A
−20
15
2.7
3.4
0.35
0.25
0.5
0.4
0.1
0.2
20
40
−0.4
−1.6
−100
26
mA
µA
mA
mA
mA
Min
Typ
(Note 6)
Max
−1.5
Units
V
V
V
Note 6:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 7:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 8:
I
CC
is measured with all outputs open, both CLEAR inputs grounded following momentary connection to 4.5V, and all other inputs grounded.
3
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