PI6CEQ20200
PCIe
®
Gen2 / Gen3 Buffer
Features
ÎÎ
PCIe Gen2/ Gen3* compliant clock buffer/ZDB
* Gen3 performance only available in Commercial temp
Description
The PI6CEQ20200 is a high performance PCIe Gen2/ Gen3
zero delay buffer with two HCSL outputs. Pericom’s proprietary
equalization technique used in this device improves signal
integrity and makes this device suitable for PCIe Gen2/ Gen3
applications even when the input from the main clock has to
travel a long distance.
Internal equalization for better signal integrity
ÎÎ
ÎÎ
HCSL outputs
2
ÎÎ
Dual PLL bandwidth for SSC tracking
ÎÎ
Cycle-to-Cycle Jitter : 40ps (typ)
ÎÎ
Output-to-Output Skew <10ps
ÎÎ
3.3V supply voltage
ÎÎ
TSSOP-20 packages
Applications
ÎÎ
Servers
ÎÎ
Embedded computing systems
ÎÎ
Networking systems
Block Diagram
Pin Configuration
(20-Pin TSSOP & 20-Pin QSOP)
OE0#
CLK0
CLK0#
PLL_BW_SEL
SRCIN
SRCIN#
OE_0#
VDD
CLK1
CLK1#
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDDA
GNDA
IRef
OE_1#
VDD
GND
CLK1
CLK1#
VDD
SCLK
SRCIN
SRCIN#
EQ
PLL
PLL_BW_SEL
SCLK
SDATA
OE1#
Control
GND
CLK0
CLK0#
VDD
SDATA
15-0058
1
www.pericom.com
Rev B
05/05/15
PI6CEQ20200
PCIe
®
Gen2 / Gen3 Buffer with Equalization
Pin Description
Pin #
1
2, 3
4
5, 9, 12, 16
6, 15
7, 8
10
11
13, 14
17
18
19
20
Pin Name
PLL_BW_SEL
SRCIN, SRCIN#
OE_0#
VDD
GND
CLK0, CLK0#
SDATA
SCLK
CKL1#, CLK1
OE_1#
IRef
GNDA
VDDA
Type
Input
Input
Input
Power
Power
Input
Input/Output
Input
Output
Input
Input
Power
Power
Description
CMOS input to select the PLL Bandwidth
HCSL inputs
Output enable for CLK0 and CLK0#. “0” is “enabled”, “1” is “tri-stated.
Internal pull-down
3.3V Power Supply
Ground
HCSL output
SMBus data
SMBus clock input
HCSL output
Output enable for CLK1 and CLK1#. “0” is “enabled”, “1” is “tri-stated.
Internal pull-down
External resistor connection for internal current reference
Analog and PLL Ground
Analog and PLL power supply
15-0058
2
www.pericom.com
Rev B
05/05/15
PI6CEQ20200
PCIe
®
Gen2 / Gen3 Buffer with Equalization
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested)
Note:
Storage temperature.............................................. -65ºC to +155ºC
Ambient Temperature with Power Applied ........-40ºC to +85ºC
3.3V Analog Supply Voltage ..................................... -0.5 to +4.6V
ESD Protection(HBM) .......................................................... 2000V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the op-
erational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
Recommended Operating Conditions
Symbol
V
DD
I
DD
I
DD_Output tri-stated
T
A
Description
Power supply
Total Power Supply Current
Total power supply current with Outputs
are tri-stated
Operating temperature
Test Conditions
-
-
Outputs are tri-stated
Commercial temperature
Industrial temperature
Min
3.135
-
-
0
-40
Type
-
-
-
Max
3.465
65
30
+70
+85
Unit
V
mA
mA
ºC
LVCMOS DC Electrical Characteristics
Î
(Over Operating Conditions)
Symbol
V
IH
V
IL
I
IH
I
IL
R
PU
R
DN
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Internal pull up resistance
Conditions
-
-
V
IN
= V
DD
V
IN
= 0V
-
Min.
2
-0.3
-
-45
-
-
Typ.
-
-
-
-
120
120
Max.
V
DD
+0.3
0.8
45
-
-
-
Unit
V
V
µA
µA
kOhm
kOhm
Internal pull down resistance -
15-0058
3
www.pericom.com
Rev B
05/05/15
PI6CEQ20200
PCIe
®
Gen2 / Gen3 Buffer with Equalization
Differential DC Input Characteristics
(Over Operating Conditions)
Symbol
I
IH
I
IL
V
IH
V
IL
Parameter
Input High Current, IN-
Input High Current, IN+
Input Low Current, IN-
Input Low Current, IN+
Input High Voltage
Input Low Voltage
Conditions
V
IN
= V
DD
=3.465V
V
IN
= 0V
Single-ended swing
Min.
-
-45
-5
660
-150
Typ.
-
-
-
700
0
Max.
5
45
-
-
850
Unit
µA
µA
µA
µA
mV
mV
HCSL DC Electrical Characteristics
(Over Operating Conditions)
Symbol
V
OH
V
OL
V
CROSS
ΔV
CROSS
I
OH
Parameter
Output High Voltage
Output Low Voltage
Absolute Crossing Point Voltages
Total variation of V
CROSS
overall edges
Output High Current w/475-Ohm resistor.
Connected between I
REF
pin and GND
Conditions
-
-
-
-
-
Min.
660
-
250
-
-
Typ.
-
-
-
-
14
Max.
850
150
550
140
-
Unit
mV
mV
mV
mV
mA
HCSL AC Switching Characteristics
(*1, *2, *3)
(Over Operating Conditions)
Symbol
F
in
T
r
/T
f
ΔT
r
/ΔT
f
T
PD
T
PDBP
T
skew
T
DC
J
C-C
J
HF-RMS
Parameter
Input Frequency
Output Rise/Fall time
Rise and Fall Time Variation
*2
Propagation delay in PLL mode
Propagation delay in bypass mode
Output-to-Output Skew
*3
Output Duty Cycle
*3
Cycle to Cycle jitter
Phase jitter, high frequency
Conditions
-
Between 0.175V and
0.525V
*2
-
PLL is enabled
PLL is bypassed
-
-
Differential waveform
RMS jitter applying
PCIE Gen2 jitter mask
*3
RMS jitter applying
PCIE Gen3 jitter mask
*3
RMS jitter applying
PCIE Gen2 jitter mask
*3
Min.
90
175
-
Typ.
100
-
-
Max.
110
700
125
650
4.0
Unit
MHz
ps
ps
ps
ns
ps
%
ps
ps
ps
ps
-
47
-
40
-
-
0.61
-
-
10
53
50
3.1
1.0
3.0
J
LF-RMS
Phase jitter, low frequency
RMS jitter applying
PCIE Gen3 jitter mask
*3
, commercial temp range
only
-
3.0
ps
15-0058
4
www.pericom.com
Rev B
05/05/15
PI6CEQ20200
PCIe
®
Gen2 / Gen3 Buffer with Equalization
HCSL AC Switching Characteristics
(*1, *2, *3)
(Over Operating Conditions) Continued..
Symbol
PLL
LBW
T
OEN
T
OEF
T
SQD
Notes:
1. Test configuration is Rs=33Ω, Rp=49.9Ω, and 2pF
2. Measurement is taken from Single Ended waveform.
3. Measurement is taken from Differential waveform.
Parameter
PLL Loop Bandwidth
OE enable time
OE disable time
Squelch detect time
Conditions
PLL_BW_SEL=1
PLL_BW_SEL=0
Min.
1.3
0.25
Typ.
Max.
3
1
100
100
Unit
MHz
MHz
ns
ns
ns
Input level is less than 150mV
(single-ended)
50
HCSL Output Buffer Characteristics
V
DD
(3.3V ± 5%)
Slope ~ 1/Rs
R
O
I
OUT
R
OS
Iout
V
OUT
= 0.85V max
0V
0.85V
Simplified diagram of current-mode output buffer
HCSL Output Buffer Characteristics
Symbol
R
O
R
OS
V
OUT
Minimum
3000Ω
unspecified
N/A
Maximum
N/A
unspecified
850mV
15-0058
5
www.pericom.com
Rev B
05/05/15
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