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CY22800FXC-015A

Description
IC PROG CLOCK GEN 8-SOIC
Categorysemiconductor    Analog mixed-signal IC   
File Size194KB,10 Pages
ManufacturerCypress Semiconductor
Environmental Compliance
Download Datasheet Parametric View All

CY22800FXC-015A Overview

IC PROG CLOCK GEN 8-SOIC

CY22800FXC-015A Parametric

Parameter NameAttribute value
typeFanout buffer (distribution), spread spectrum clock generator
PLLyes
enterclock, crystal
outputLVCMOS
Number of circuits1
Ratio - Input:Output1:3
Differential - Input:OutputNone/None
Frequency - maximum100MHz
Frequency divider/multiplierYes Yes
Voltage - Power3.14 V ~ 3.47 V
Operating temperature0°C ~ 70°C
Installation typesurface mount
Package/casing8-SOIC (0.154", 3.90mm wide)
Supplier device packaging8-SOIC
CY22800
Universal Programmable Clock Generator
(UPCG)
Features
Benefits
Spread Spectrum, VCXO, and Frequency Select
Input frequency range:
Crystal: 8–30 MHz
CLKIN: 0.5–100 MHz
Output frequency:
Commercial: 1–200 MHz
Industrial: 1–166 MHz
Integrated phase-locked loop
Low jitter, high accuracy outputs
3.3V operation
8-pin SOIC package
Inventory of only one device, CY22800, is needed in various
applications such as HDTV, STB, DVDR, and so on.
Multiple predefined configurations that can be programmed
into a single chip.
Eliminates the need for expensive and difficult to use
higher-order crystal.
High-performance PLL tailored for multiple applications.
Meets critical timing requirements in complex system designs.
Enables application compatibility.
Allows up to three different frequency selects.
Logic Block Diagram
XIN/CLKIN
XOUT
VCXO
FS2
FS1
FS0
OSC
Q
Φ
VCO
P
CLKC
OUTPUT
DIVIDER
CLKB
CLKA
PLL
(with modulation control)
VDD
VSS
Pin Configuration
Figure 1. CY22800 8-Pin SOIC
XIN/CLKIN
VDD
FS0/VCXO
VSS
1
2
3
4
8
7
6
5
XOUT
CLKC/FS2/VSS
CLKA/FS0
CLKB/FS1
Table 1. Pin Definition
Name
XIN
VDD
FS0/VCXO
VSS
CLKB/FS1
CLKA/FS0
CLKC/FS2/VSS
XOUT
Pin Number
1
2
3
4
5
6
7
8
Description
Reference Input; Crystal or External Clock
3.3V Voltage Supply
Frequency Select 0/VCXO Analog Control Voltage
[1]
Ground
Clock Output B/Frequency Select 1
[1]
Clock Output A/Frequency Select 0
[1]
Clock Output C/Frequency Select 2/VSS
[1]
Reference Output (No Connect when the reference is a clock)
Note
1. Pin definition changes for different configurations. Refer to the specific one-page data sheet for more details.
Cypress Semiconductor Corporation
Document #: 001-07704 Rev. *B
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised May 25, 2008
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