DS2401X1-S#T datasheet, PDF - EEWORLD Datasheet

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DS2401X1-S#T: DescriptionIC SILICON SERIAL NUMBER 2CSP; Categorystorage storage; File Size209KB，11 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html; Environmental Compliance

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DS2401X1-S#T Overview

IC SILICON SERIAL NUMBER 2CSP

DS2401X1-S#T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Maxim
package instruction	FLIPCHIP-2
Reach Compliance Code	unknown
JESD-30 code	R-XBCC-B2
length	1.321 mm
memory density	64 bit
Memory IC Type	MEMORY CIRCUIT
memory width	1
Mixed memory types	N/A
Number of functions	1
Number of terminals	2
word count	64 words
character code	64
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	64X1
Package body material	UNSPECIFIED
encapsulated code	BCC
Encapsulate equivalent code	BGA2,1X2,28
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/5 V
Certification status	Not Qualified
Maximum seat height	0.649 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2.8 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BUTT
Terminal pitch	0.704 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	0.661 mm
Base Number Matches	1

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19-5860; Rev 12/16

DS2401

Silicon Serial Number

BENEFITS AND FEATURES

•

Guaranteed Unique 64-Bit ROM ID Chip for

Absolute Traceability

Unique, Factory-Lasered and Tested

64-Bit Registration Number (8-Bit Family

Code +48-Bit Serial Number + 8-Bit CRC

Tester)

8-Bit Family Code Specifies DS2401

Communications Requirements to Reader

Minimalist 1-Wire® Interface Lowers Cost

and Interface Complexity

Multiple DS2401 Devices Can Reside on

a Common 1-Wire Net

Built-In Multidrop Controller Ensures

Compatibility with Other 1-Wire Net

Products

Reduces Control, Address, Data, and

Power to a Single Pin and Communicates

at Up to 16.3kbps

Presence Pulse Acknowledges When the

Reader First Applies Voltage

Low-Cost TO-92, SOT-223, and TSOC

Surface-Mount Packages

TO-92 Tape-and-Reel Version with Leads

Bent to 100-mil Spacing (Default) or with

Straight Leads (DS2401-SL)

Wide Voltage and Temperature Operating

Ranges Enables Robust System Performance

Extended 2.8V to 6.0V Range

Zero Standby Power Required

-40°C to +85°C Industrial Temperature

Range

PIN CONFIGURATIONS

TO-92

TSOC

DS2401

TOP VIEW

•

1 2 3

TOP VIEW

BOTTOM VIEW

Flip Chip, Top View

with Laser Mark,

Contacts Not Visible.

“rrd” = Revision/Date

01rrd



TOP VIEW

DS2401

WLP

APPLICATIONS

PCB Identification

Network Node ID

Equipment Registration

PIN DESCRIPTIONS

NAME

DATA

(DQ)

GROUND

N.C. (No

Connect)

TO-92

SOT-

223

1, 4

TSOC

3–6

FLIP-

CHIP

—

WLP

A1, B1

A2, B2

—

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

1 of 11

DS2401

ORDERING INFORMATION

PART

DS2401+

DS2401+T&R

DS2401-SL+T&R

DS2401P+

DS2401P+T&R

DS2401Z+

DS2401Z+T&R

DS2401X1-S#T

DS2401X-S+T

TEMP RANGE

-40°C to +85°C

PIN-PACKAGE

3 TO-92

3 TO-92 (formed leads)

3 TO-92 (straight leads)

6 TSOC

4 SOT-223

2 Flip Chip (2.5k pieces)

4 WLP

+Denotes

a lead(Pb)-free/RoHS-compliant package.

T&R/T = Tape and reel.

SL = Straight leads.

#Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements.

DESCRIPTION

The DS2401 enhanced silicon serial number is a low-cost, electronic registration number that provides an

absolutely unique identity which can be determined with a minimal electronic interface (typically, a

single port pin of a microcontroller). The DS2401 consists of a factory-lasered, 64-bit ROM that includes

a unique 48-bit serial number, an 8-bit CRC, and an 8-bit Family Code (01h). Data is transferred serially

via the 1-Wire protocol that requires only a single data lead and a ground return. Power for reading and

writing the device is derived from the data line itself with no need for an external power source. The

DS2401 is an upgrade to the DS2400. The DS2401 is fully reverse-compatible with the DS2400 but

provides the additional multi-drop capability that enables many devices to reside on a single data line.

The familiar TO-92, SOT-223 or TSOC package provides a compact enclosure that allows standard

assembly equipment to handle the device easily.

OPERATION

The DS2401’s internal ROM is accessed via a single data line. The 48-bit serial number, 8-bit family

code and 8-bit CRC are retrieved using the Maxim 1-Wire protocol. This protocol defines bus

transactions in terms of the bus state during specified time slots that are initiated on the falling edge of

sync pulses from the bus master. All data is read and written least significant bit first.

1-Wire BUS SYSTEM

The 1-Wire bus is a system which has a single bus master system and one or more slaves. In all instances,

the DS2401 is a slave device. The bus master is typically a microcontroller. The discussion of this bus

system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire

signaling (signal type and timing).

Hardware Configuration

The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to

drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have an

open-drain connection or 3-state outputs. The DS2401 is an open-drain part with an internal circuit

equivalent to that shown in Figure 2. The bus master can be the same equivalent circuit. If a bidirectional

pin is not available, separate output and input pins can be tied together. The bus master requires a pullup

resistor at the master end of the bus, with the bus master circuit equivalent to the one shown in Figure 3.

The value of the pullup resistor should be approximately 5kΩ for short line lengths. A multidrop bus

consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus has a maximum data rate of

16.3kbits per second.

2 of 11

DS2401

TRANSACTION SEQUENCE

The sequence for accessing the DS2401 via the 1-Wire port is as follows:



Initialization

ROM Function Command

Read Data

INITIALIZATION

All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence

consists of a reset pulse transmitted by the bus master followed by a Presence Pulse(s) transmitted by the

slave(s).

The Presence Pulse lets the bus master know that the DS2401 is on the bus and is ready to operate. For

more details, see the 1-Wire Signaling section.

ROM FUNCTION COMMANDS

Once the bus master has detected a presence, it can issue one of the four ROM function commands. All

ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in Figure

4).

Read ROM [33h] or [0Fh]

This command allows the bus master to read the DS2401’s 8-bit family code, unique 48-bit serial

number, and 8-bit CRC. This command can only be used if there is a single DS2401 on the bus. If more

than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same

time (open drain will produce a wired-AND result). The DS2401 Read ROM function will occur with a

command byte of either 33h or 0Fh in order to ensure compatibility with the DS2400, which will only

respond to a 0Fh command word with its 64-bit ROM data.

Match ROM [55h] / Skip ROM [CCh]

The complete 1-Wire protocol for all Maxim iButtons® contains a Match ROM and a Skip ROM

command. Since the DS2401 contains only the 64-bit ROM with no additional data fields, the Match

ROM and Skip ROM are not applicable and will cause no further activity on the 1-Wire bus if executed.

The DS2401 does not interfere with other 1-Wire parts on a multidrop bus that do respond to a Match

ROM or Skip ROM (for example, a DS2401 and DS1994 on the same bus).

Search ROM [F0h]

When a system is initially brought up, the bus master might not know the number of devices on the

1-Wire bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process

of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The ROM search process

is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the

desired value of that bit. The bus master performs this simple 3-step routine on each bit of the ROM.

After one complete pass, the bus master knows the contents of the ROM in one device. The remaining

number of devices and their ROM codes may be identified by additional passes. Refer to

Application

Note 187: 1-Wire Search Algorithm

for a comprehensive discussion of a ROM search, including an actual

example.

iButton is a registered trademark of Maxim Integrated Products, Inc.

4 of 11

DS2401X1-S#T Related Products

	DS2401X1-S#T	DS2401X-S+T	DS2401Z-TR	DS2401X1#U	DS2401+T&R;	DS2401Z+T&R;
Description	IC SILICON SERIAL NUMBER 2CSP	Memory Circuit, 64X1, CMOS, PBGA4, WLP-4	Security ICs / Authentication ICs	IC SILICON SER NUMBER 2FLIPCHIP	IC SILICON SERIAL NUMBER TO92-3	Memory type: Non-Volatile Memory interface type: 1-Wire Memory capacity: - Operating voltage: 2.8V ~ 6V An enhanced, silicon serial number electronic registration code chip, a single-bus memory chip with a built-in 64-bit globally unique ID number .

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