CYW311OXC datasheet, PDF - EEWORLD Datasheet

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CYW311OXC: DescriptionIC CLOCK DDR266 PRO VIA 48SSOP; CategoryThe embedded processor and controller Microcontrollers and processors; File Size429KB，19 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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CYW311OXC Overview

IC CLOCK DDR266 PRO VIA 48SSOP

CYW311OXC Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Parts packaging code	SSOP
package instruction	SSOP,
Contacts	48
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	CAN ALSO OPERATE AT 3.3V SUPPLY
JESD-30 code	R-PDSO-G48
length	15.875 mm
Number of terminals	48
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Master clock/crystal nominal frequency	14.31818 MHz
Certification status	Not Qualified
Maximum seat height	2.794 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.5057 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC

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W311

FTG for VIA™ Pro-266 DDR Chipset

Features

• Maximized EMI Suppression using Cypress’s Spread

Spectrum Technology

• System frequency synthesizer for VIA Pro-2000

• Programmable clock output frequency with less than 1

MHz increment

• Integrated fail-safe Watchdog Timer for system

recovery

• Automatically switch to HW selected or SW

programmed clock frequency when Watchdog Timer

time-out

• Capable of generate system RESET after a Watchdog

Timer time-out occurs or a change in output frequency

via SMBus interface

• Support SMBus byte read/write and block read/ write

operations to simplify system BIOS development

• Vendor ID and Revision ID support

• Programmable drive strength for CPU and PCI output

clocks

• Programmable output skew between CPU, AGP and PCI

• Supports Intel

Celeron

and Pentium

III class

processor

• Three copies of CPU output

• Nine copies of PCI output

• One 48 MHz output for USB

• One 24 MHz or 48 MHz output for SIO

• Two buffered reference outputs

• Three copies of APIC output

• Supports frequencies up to 200MHz

• SMBus Interface for programming

• Power management control inputs

• Available in 48-pin SSOP

Key Specifications

CPU Cycle-to-cycle Jitter: .......................................... 250 ps

CPU to CPU Output Skew........................................... 175 ps

PCI Cycle-to-cycle Jitter: ............................................. 500 ps

PCI to PCI Output Skew:............................................. 500 ps

Block Diagram

Pin Configuration

[1]

Note:

1. Signals marked with * have internal pull-up resistors

......................... Document #: 38-07703 Rev. ** Page 1 of 18

400 West Cesar Chavez, Austin, TX 78701

1+(512) 416-8500

1+(512) 416-9669

www.silabs.com

CYW311OXC Related Products

	CYW311OXC	CYW311OXCT
Description	IC CLOCK DDR266 PRO VIA 48SSOP	IC clock ddr266 pro via 48ssop
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	Silicon Laboratories Inc	Silicon Laboratories Inc
Parts packaging code	SSOP	SSOP
package instruction	SSOP,	SSOP,
Contacts	48	48
Reach Compliance Code	unknown	unknow
ECCN code	EAR99	EAR99
Other features	CAN ALSO OPERATE AT 3.3V SUPPLY	CAN ALSO OPERATE AT 3.3V SUPPLY
JESD-30 code	R-PDSO-G48	R-PDSO-G48
length	15.875 mm	15.875 mm
Number of terminals	48	48
Maximum operating temperature	70 °C	70 °C
Maximum output clock frequency	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
Master clock/crystal nominal frequency	14.31818 MHz	14.31818 MHz
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.794 mm	2.794 mm
Maximum supply voltage	2.625 V	2.625 V
Minimum supply voltage	2.375 V	2.375 V
Nominal supply voltage	2.5 V	2.5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	7.5057 mm	7.5057 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC	CLOCK GENERATOR, PROCESSOR SPECIFIC

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