EEWORLDEEWORLDEEWORLD

Part Number

Search

SI5338B-B05286-GM

Description
I2C CONTROL, 4-OUTPUT, ANY FREQU
Categorysemiconductor    Analog mixed-signal IC   
File Size2MB,46 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric View All

SI5338B-B05286-GM Online Shopping

Suppliers Part Number Price MOQ In stock  
SI5338B-B05286-GM - - View Buy Now

SI5338B-B05286-GM Overview

I2C CONTROL, 4-OUTPUT, ANY FREQU

SI5338B-B05286-GM Parametric

Parameter NameAttribute value
Installation typesurface mount
Package/casing24-VFQFN Exposed Pad
Supplier device packaging24-QFN(4x4)
Si5338
I
2
C - P
R O GRA MM A B LE
A
NY
- F
R E Q U E N C Y
, A
NY
- O
UTPUT
Q
UAD
C
LOCK
G
ENERATOR
Features
Low power MultiSynth™ technology
enables independent, any-frequency
synthesis on four differential output
drivers
PCIe Gen 1/2/3/4 Common Clock and
Gen 3 SRNS compliant
Highly-configurable output drivers with
up to four differential outputs, eight
single-ended clock outputs, or a
combination of both
Low phase jitter of 0.7 ps RMS typ
High precision synthesis allows true
zero ppm frequency accuracy on all
outputs
Flexible input reference:

External
Single supply core with excellent
PSRR: 1.8, 2.5, 3.3 V
Independent frequency increment/
decrement feature enables
glitchless frequency adjustments in
1 ppm steps
Independent phase adjustment on
each of the output drivers with an
accuracy of <20 ps steps
Highly configurable spread
spectrum (SSC) on any output:
frequency from 5 to 350 MHz

Any spread from 0.5 to 5.0%

Any modulation rate from 33 to
63 kHz

Any
Ordering Information:
See page 42.
Pin Assignments
RSVD_GND
CLK0A
CLK0B
VDD
VDDO0
20
Independently configurable outputs
support any frequency or format:

LVPECL/LVDS:

HCSL:
0.16 to 710 MHz
0.16 to 250 MHz

CMOS: 0.16 to 200 MHz

SSTL/HSTL: 0.16 to 350 MHz
Independent output voltage per driver:
1.5, 1.8, 2.5, or 3.3 V
I
2
C/SMBus compatible interface
Easy to use programming software
Small size: 4 x 4 mm, 24-QFN
Low power: 45 mA core supply typ
Wide temperature range: –40 to
+85 °C
24
23
22
21
19
18
CLK1A
17
CLK1B
16
VDDO1
15
VDDO2
14
CLK2A
13
CLK2B
IN1
1
IN2
2
IN3
3
IN4
4
IN5
5
GND
GND
Pad
Applications
IN6
6
Ethernet switch/router
PCIe Gen1/2/3/4
Broadcast video/audio timing
Processor and FPGA clocking
Any-frequency clock conversion
MSAN/DSLAM/PON
Fibre Channel, SAN
Telecom line cards
1 GbE and 10 GbE
7
8
9
10
11
12
INTR
Description
The Si5338 is a high-performance, low-jitter clock generator capable of
synthesizing any frequency on each of the device's four output drivers. This timing
IC is capable of replacing up to four different frequency crystal oscillators or
operating as a frequency translator. Using its patented MultiSynth™ technology,
the Si5338 allows generation of four independent clocks with 0 ppm precision.
Each output clock is independently configurable to support various signal formats
and supply voltages. The Si5338 provides low-jitter frequency synthesis in a
space-saving 4 x 4 mm QFN package. The device is programmable via an I
2
C/
SMBus-compatible serial interface and supports operation from a 1.8, 2.5, or
3.3 V core supply. I
2
C device programming is made easy with the ClockBuilder™
Desktop software available at
www.silabs.com/ClockBuilder.
Measuring PCIe
clock jitter is quick and easy with the Silicon Labs PCIe Clock Jitter Tool.
Download it for free at
www.silabs.com/pcie-learningcenter.
Rev. 1.6 12/15
Copyright © 2015 by Silicon Laboratories
VDDO3
VDD
CLK3B
CLK3A
SCL
SDA
crystal: 8 to 30 MHz

CMOS input: 5 to 200 MHz

SSTL/HSTL input: 5 to 350 MHz

Differential input: 5 to 710 MHz
External feedback mode allows
zero-delay mode
Loss of lock and loss of signal
alarms
Top View
Si5338
【Synopsys IP Resources】 Comprehensive IP Solutions to Help HPC Chip Development
In the field of chip design, using silicon-proven IP is a proven practice.事实上,这种既能节省时间又能提高质量的复杂片上系统(SoC)开发方法的使用范围越来越广,普及率越来越高。特别是在高速增长的动态细分市场中,基于IP的设计已被证明是一种可以显著缩短开发时间、确保输出更高质量的产品、以及提高工程人员工作效率的手段,便于工程...
arui1999 Integrated technical exchanges
Arrow Interview: RoHS's green and environmentally friendly road has not yet reached its end
[i=s]This post was last edited by jameswangsynnex on 2015-3-3 20:00[/i]...
rain Mobile and portable
Coal Mine Ventilation System Case Introduction
Reconstruction plan for the centralized monitoring system of various parameters of ventilation fans in Tongmei Group's coal minesCoal mine accidents are frequent, causing huge losses to the country. T...
l380730475 Industrial Control Electronics
GPIO Features of TMS320C6748
Referring to the 1.2Features section of the TI technical document SPRUFL8B (TMS320C674x/OMAP-L1x Processor GPIO User's Guide), we can see that the GPIO of the TMS320C6748 has the following features: 1...
灞波儿奔 DSP and ARM Processors
FPGA realizes high-speed transmission module
[size=6]I beg you to tell me which expert has the source code or related information about FPGA high-speed transmission? I am doing related learning work, my email address is: [u] [email]ziqiang10@126...
ziqiang10 FPGA/CPLD
Wince self-starting problem
When setting the program to start automatically, I used two methods: 1. Change the program name to explorer.exe, and then put it in the Release folder, overwriting the original explorer.exe. The bin f...
koalaping Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1737  1237  352  1041  2500  35  25  8  21  51 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号