530RB000127DGR datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> 530RB000127DGR

530RB000127DGR: DescriptionSINGLE FREQUENCY XO, OE PIN 2 (O; CategoryPassive components; File Size450KB，12 Pages; ManufacturerSilicon Laboratories Inc

Download Datasheet Parametric View All

530RB000127DGR Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	530RB000127DGR	-	-	View	Buy Now

530RB000127DGR Overview

SINGLE FREQUENCY XO, OE PIN 2 (O

530RB000127DGR Parametric

Parameter Name	Attribute value
type	XO (Standard)
frequency	127kHz
Function	enable/disable
output	LVPECL
Voltage - Power	2.5V
frequency stability	±20ppm
Absolute pulling range (APR)	-
Operating temperature	-40°C ~ 85°C
Current - Power (maximum)	121mA
grade	-
Installation type	surface mount
Package/casing	6-SMD, no leads
size/dimensions	0.276" long x 0.197" wide (7.00mm x 5.00mm)
Height - Installation (maximum)	0.071"（1.80mm）
Current - Power (disabled) (maximum)	75mA

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R YS TA L

SCILLATOR

(XO) (10 M H

Features

Available with any-rate output



frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz



3rd generation DSPLL

with superior



jitter performance



3x better frequency stability than



SAW-based oscillators



1.4 GH

)

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout



Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH



Networking



SD/HD video



Test and measurement



Clock and data recovery



FPGA/ASIC clock generation



Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.5 6/18

Si530/531

Recommended Resources

Circuit diagram of voltage adjustable output

Tilt, level circuit diagram

Self-excited equivalent inductance RC oscillator circuit diagram

Precision analog multiplier circuit diagram

TDA7056 power amplifier circuit

Wien bridge and its oscillator circuit

Tips for using TI power supply - Development board rush purchase_2: I have used TI's DC-DC and have some experience with it. TPS5XXXX, I forgot the specific model.The peripheral circuit has inductors and capacitors.During a certain experiment, it was found that the po...; jlqsczw_2007 Analogue and Mixed Signal

Security monitoring, surveillance engineering (Network Monitoring Department of Shenzhen Xindalai Technology Co., Ltd.): [table=98%][tr][td]The Network Engineering Department of Shenzhen Xindalai Technology Co., Ltd. is an intelligent system integration company established with the investment support of JSA-CCTV Electro...; nihayer Industrial Control Electronics

Why is there a line on the 3D graph?: As shown below....; ljx123 PCB Design

Ask on Stack Overflow: //Port 2 interrupt//#pragma vector=PORT2_VECTOR__interrupt void waterflow(){if((P2IFG&BIT1)==BIT1)//Card entry signal interrupt{SET_GIE;P2IE&=~BIT1;P2IFG&=~BIT1;//Clear interrupt flag....P2IE|=BIT1;LP...; jhxajh Microcontroller MCU

Ask for advice on compiling kernel: 哪位遇见过这样的问题？怎么解决啊？帮帮忙吧！ CeNlsCmp:Total for all locales: 77588 bytes CeNlsCmp: Writing out calendars CeNlsCmp:Calendar 1: 28 bytes CeNlsCmp:Total for all calendars: 28 bytes CeNlsCmp: Writing out code p...; xuesong999 Embedded System

Seeking like-minded people!: Today, I was looking up information and happened to visit the forum. I found that there are quite a few people who are involved in electronic software and hardware. :)I have always had the idea of dev...; szftrm Medical Electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components