74VHCT02PW,118 datasheet, PDF - EEWORLD Datasheet

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74VHCT02PW,118: DescriptionIC GATE NOR 4CH 2-INP 14TSSOP; Categorylogic logic; File Size581KB，14 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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74VHCT02PW,118 Overview

IC GATE NOR 4CH 2-INP 14TSSOP

74VHCT02PW,118 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Is it Rohs certified?	conform to
Maker	Nexperia
Parts packaging code	TSSOP
package instruction	TSSOP-14
Contacts	14
Manufacturer packaging code	SOT402-1
Reach Compliance Code	compliant
Samacsys Description	74VHC(T)02 - Quad 2-input NOR gate@en-us
series	AHCT/VHCT/VT
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	5 mm
Logic integrated circuit type	NOR GATE
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	9.5 ns
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	4.4 mm

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74VHC02; 74VHCT02

Quad 2-input NOR gate

Rev. 01 — 13 August 2009

Product data sheet

1. General description

The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible

with Low-power Schottky TTL (LSTTL). They are speciﬁed in compliance with JEDEC

standard No. 7-A.

The 74VHC02; 74VHCT02 provide a quad 2-input NOR function.

2. Features

Balanced propagation delays

All inputs have a Schmitt-trigger action

Inputs accept voltages higher than V

Input levels:

The 74VHC02 operates with CMOS input level

The 74VHCT02 operates with TTL input level

ESD protection:

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101C exceeds 1000 V

Multiple package options

Speciﬁed from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C

3. Ordering information

Table 1.

Ordering information

Package

Temperature range Name

74VHC02D

74VHCT02D

74VHC02PW

74VHCT02PW

74VHC02BQ

74VHCT02BQ

−40 °C

to +125

°C

DHVQFN14

−40 °C

to +125

°C

TSSOP14

−40 °C

to +125

°C

SO14

Description

plastic small outline package; 14 leads;

body width 3.9 mm

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

Version

SOT108-1

SOT402-1

Type number

plastic dual in-line compatible thermal enhanced very SOT762-1

thin quad ﬂat package; no leads; 14 terminals;

body 2.5

0.85 mm

74VHCT02PW,118 Related Products

	74VHCT02PW,118	74VHC02BQ,115	74VHCT02BQ,115	74VHCT02D,118	74VHC02PW,118
Description	IC GATE NOR 4CH 2-INP 14TSSOP	IC GATE NOR 4CH 2-INP 14DHVQFN	IC GATE NOR 4CH 2-INP 14DHVQFN	IC GATE NOR 4CH 2-INP 14SO	IC GATE NOR 4CH 2-INP 14TSSOP
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Maker	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Parts packaging code	TSSOP	QFN	QFN	SOIC	TSSOP
package instruction	TSSOP-14	HVQCCN,	HVQCCN,	SOP-14	TSSOP,
Contacts	14	14	14	14	14
Manufacturer packaging code	SOT402-1	SOT762-1	SOT762-1	SOT108-1	SOT402-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
Samacsys Description	74VHC(T)02 - Quad 2-input NOR gate@en-us	74VHC(T)02 - Quad 2-input NOR gate@en-us	74VHC(T)02 - Quad 2-input NOR gate@en-us	74VHC(T)02 - Quad 2-input NOR gate@en-us	74VHC(T)02 - Quad 2-input NOR gate@en-us
series	AHCT/VHCT/VT	AHC/VHC/H/U/V	AHCT/VHCT/VT	AHCT/VHCT/VT	AHC/VHC/H/U/V
JESD-30 code	R-PDSO-G14	R-PQCC-N14	R-PQCC-N14	R-PDSO-G14	R-PDSO-G14
JESD-609 code	e4	e4	e4	e4	e4
length	5 mm	3 mm	3 mm	8.65 mm	5 mm
Logic integrated circuit type	NOR GATE	NOR GATE	NOR GATE	NOR GATE	NOR GATE
Humidity sensitivity level	1	1	1	1	1
Number of functions	4	4	4	4	4
Number of entries	2	2	2	2	2
Number of terminals	14	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	HVQCCN	HVQCCN	SOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260
propagation delay (tpd)	9.5 ns	14.5 ns	9.5 ns	9.5 ns	14.5 ns
Maximum seat height	1.1 mm	1 mm	1 mm	1.75 mm	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	2 V	4.5 V	4.5 V	2 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	NO LEAD	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.5 mm	0.5 mm	1.27 mm	0.65 mm
Terminal location	DUAL	QUAD	QUAD	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30
width	4.4 mm	2.5 mm	2.5 mm	3.9 mm	4.4 mm

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