TCM809/TCM810
3-Pin Microcontroller Reset Monitors
Features
• Precision V
DD
Monitor for 2.5V, 3.0V, 3.3V, 5.0V
Nominal System Voltage Supplies
• 140 msec Minimum RESET Time-Out Period
• RESET Output to V
DD
= 1.0V (TCM809)
• Low Supply Current, 9 µA (typ.)
• V
DD
Transient Immunity
• Small 3-Pin SC-70 and SOT-23B Packages
• No External Components
• Push-Pull RESET Output
• Temperature Ranges:
- Industrial: SC-70 (E): -40°C to +85°C
- Extended: SOT-23, SC-70 (V): -40°C to +125°C
General Description
The TCM809 and TCM810 are cost-effective system
supervisor circuits designed to monitor V
DD
in digital
systems; providing a reset signal to the host processor,
when necessary. No external components are
required.
The RESET output is typically driven active within
65 µsec of V
DD
falling through the reset voltage thresh-
old. RESET is maintained active for a minimum of
140 msec after V
DD
rises above the reset threshold.
The TCM810 has an active-high RESET output, while
the TCM809 has an active-low RESET output. The
output of the TCM809/TCM810 is valid down to
V
DD
= 1V. Both devices are available in 3-Pin SC-70
and SOT-23B packages.
The TCM809/TCM810 are optimized to reject fast
transient glitches on the V
DD
line. A low supply current
of 9 µA (typ., V
DD
= 3.3V) make these devices suitable
for battery-powered applications.
Applications
•
•
•
•
•
Computers
Embedded Systems
Battery-powered Equipment
Critical Microcontroller Power Supply Monitoring
Automotive
Pin Configurations
SOT-23B/SC-70
Typical Application Circuit
TCM809/
TCM810
V
DD
3
V
DD
V
DD
PICmicro
®
Microcontroller
2
RESET
INPUT
(Active-Low)
GND
TCM809
RESET
TCM810
(RESET)
2
GND 1
3
V
DD
TCM809
RESET
GND
1
Note:
3-Pin SOT-23B is equivalent to
JEDEC TO-236.
©
2005 Microchip Technology Inc.
DS21661D-page 1
TCM809/TCM810
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings†
Supply Voltage (V
DD
to GND) ........................................................6.0V
RESET, RESET ................................................... -0.3V to (V
DD
+0.3V)
Input Current, V
DD
.......................................................................20 mA
Output Current, RESET, RESET.................................................20 mA
dV/dt (V
DD
)........................................................................... 100V/µsec
Operating Temperature Range ...................................-40°C to +125°C
Power Dissipation (T
A
= 70°C):
3-Pin SOT-23B (derate 4 mW/°C above +70°C) ....................320 mW
3-Pin SC-70 (derate 2.17 mW/°C above +70°C)....................174 mW
Storage Temperature Range .......................................-65°C to +150°C
Maximum Junction Temperature, T
J
............................................ 150°C
ELECTRICAL CHARACTERISTICS
V
DD
= Full Range, T
A
= Operating Temperature Range, unless otherwise noted. Typical values are at T
A
= +25°C,
V
DD
= 5V for L/M/J, 3.3V for T/S, 3.0V for R and 2.5V for Z
(Note 1).
Parameter
V
DD
Range
Supply Current
Reset Threshold
(Note 2)
I
CC
V
TH
Sym
Min
1.0
1.2
—
—
4.56
4.50
4.31
4.25
3.93
3.89
3.04
3.00
2.89
2.85
2.59
2.55
2.28
2.25
Reset Threshold Tempco
V
DD
to Reset Delay,
Reset Active Time Out
Period
RESET Output Voltage
Low (TCM809)
V
OL
—
—
140
—
—
—
RESET Output Voltage
High (TCM809)
RESET Output Voltage
Low (TCM810)
RESET Output Voltage
High (TCM810)
V
OH
V
OL
V
OH
0.8 V
DD
V
DD
– 1.5
—
—
0.8 V
DD
Typ
—
—
12
9
4.63
—
4.38
—
4.00
—
3.08
—
2.93
—
2.63
—
2.32
—
30
65
320
—
—
—
—
—
—
—
—
Max
5.5
5.5
30
25
4.70
4.75
4.45
4.50
4.06
4.10
3.11
3.15
2.96
3.00
2.66
2.70
2.35
2.38
—
—
560
0.3
0.4
0.3
—
—
0.3
0.4
—
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ppm/°C
µsec
msec
V
TCM809R/S/T/Z:
TCM809L/M/J:
V
DD
= V
TH
min, I
SINK
= 1.2 mA
V
DD
= V
TH
min, I
SINK
= 3.2 mA
V
DD
= V
TH
to (V
TH
– 100 mV)
(Note 2)
TCM8xxZ:
TCM8xxR:
TCM8xxS:
TCM8xxT:
TCM809J:
TCM8xxM:
V
µA
Units
V
Test Conditions
T
A
= 0°C to +70°C
T
A
= – 40°C to +125°C
TCM8xxL/M/J:
TCM8xxR/S/T/Z:
TCM8xxL:
V
DD
< 5.5V
V
DD
< 3.6V
T
A
= +25°C
T
A
= – 40°C to +125°C
T
A
= +25°C
T
A
= – 40°C to +125°C
T
A
= +25°C
T
A
= – 40°C to +125°C
T
A
= +25°C
T
A
= – 40°C to +125°C
T
A
= +25°C
T
A
= – 40°C to +125°C
T
A
= +25°C
T
A
= – 40°C to +125°C
T
A
= +25°C
T
A
= – 40°C to +125°C
V
DD
> 1.0V, I
SINK
= 50 µA
TCM809R/S/T/Z:
V
DD
> V
TH
max, I
SOURCE
= 500 µA
TCM809L/M/J:
V
DD
> V
TH
max, I
SOURCE
= 800 µA
TCM810R/S/T/Z:V
DD
= V
TH
max, I
SINK
= 1.2 mA
TCM810L/M:
V
DD
= V
TH
max, I
SINK
= 3.2 mA
1.8 < V
DD
< V
TH
min, I
SOURCE
= 150 µA
Note 1:
Production testing done at T
A
= +25°C, overtemperature limits ensured by QC screen.
2:
RESET output for
TCM809,
RESET output for
TCM810.
DS21661D-page 2
©
2005 Microchip Technology Inc.
TCM809/TCM810
2.0
Note:
TYPICAL PERFORMANCE CHARACTERISTICS
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
18
TCM8xx/R/S/T/Z, No Load
16
14
12
10
V
DD
= 3V
8
6
4
2
0
-40
-20
0
20
40
60
80
100
120
0
-40
-20
0
20
40
60
Temperature (°C)
80
100
120
V
DD
= 1V
Power-up Reset Timeout (µsec)
Supply Current ( µA)
350
300
250
200
150
100
50
V
DD
= 5V
450
400
Temperature (°C)
FIGURE 2-1:
Temperature.
16
TCM8xx/L/M/J, No Load
14
12
Supply Current ( µA)
10
Supply Current vs.
FIGURE 2-3:
vs. Temperature.
1.001
Power-up Reset Time Out
V
DD
= 5V
Normalized Reset Threshold
1
V
DD
= 3V
8
6
4
2
0
-40
-20
0
20
40
60
80
100
120
V
DD
= 1V
0.999
0.998
0.997
-40
-20
0
20
40
60
80
100
120
Temperature (°C)
Temperature (°C)
FIGURE 2-2:
Temperature.
Supply Current vs.
FIGURE 2-4:
Normalized Reset
Threshold vs. Temperature.
©
2005 Microchip Technology Inc.
DS21661D-page 3
TCM809/TCM810
3.0
PIN DESCRIPTIONS
The descriptions of the pins are given in Table 3-1.
TABLE 3-1:
NAME
GND
PIN FUNCTION TABLE
FUNCTION
Ground
RESET (TCM809) RESET push-pull output
RESET (TCM810) RESET push-pull output
V
DD
Supply voltage (+2.5V, +3.0V,
+3.3V, +5.0V).
3.1
Ground (GND)
Ground terminal.
3.2
RESET Output (TCM809)
The RESET push-pull output remains low while V
DD
is
below the reset voltage threshold, and for 240 msec
(140 msec min.) after V
DD
rises above reset threshold.
3.3
RESET Output (TCM810)
The RESET push-pull output remains high while V
DD
is
below the reset voltage threshold, and for 240 msec
(140 msec min.) after V
DD
rises above reset threshold.
3.4
Supply Voltage (V
DD
)
V
DD
: +2.5V, +3.0V, +3.3V and +5.0V
DS21661D-page 4
©
2005 Microchip Technology Inc.
TCM809/TCM810
4.0
4.1
APPLICATIONS INFORMATION
V
DD
Transient Rejection
Combinations above the curve are detected as a
brown-out or power-down condition. Transient
immunity can be improved by adding a capacitor in
close proximity to the V
DD
pin of the TCM809/TCM810.
The TCM809/TCM810 provides accurate V
DD
monitor-
ing and reset timing during power-up, power-down and
brown-out/sag conditions. These devices also reject
negative-going transients (glitches) on the power
supply line. Figure 4-1 shows the maximum transient
duration vs. maximum negative excursion (overdrive)
for glitch rejection. Any combination of duration and
overdrive that lies under the curve will not generate a
reset signal.
V
DD
V
TH
Overdrive
4.2
RESET Signal Integrity During
Power-Down
Duration
Maximum Transient Duration (µsec)
400
320
240
160
TCM8XXL/M/J
(SOT-23)
80
0
TCM8XXZ/R/S/T
(SOT-23)
T
A
= +25°C
The TCM809 RESET output is valid to V
DD
= 1.0V.
Below this voltage the output becomes an "open cir-
cuit" and does not sink current. This means CMOS
logic inputs to the microcontroller will be floating at an
undetermined voltage. Most digital systems are
completely shut down well above this voltage.
However, in situations where RESET must be main-
tained valid to V
DD
= 0V, a pull-down resistor must be
connected from RESET to ground to discharge stray
capacitances and hold the output low (Figure 4-2). This
resistor value, though not critical, should be chosen
such that it does not appreciably load RESET under
normal operation (100 kΩ will be suitable for most
applications). Similarly, a pull-up resistor to V
DD
is
required for the TCM810 to ensure a valid high RESET
for V
DD
below 1.0V.
V
DD
V
DD
TCM809
RESET
R
1
100 kΩ
1
5
1000
100
Reset Comparator Overdrive
[V
TH
– V
DD
] (mv)
GND
130
V
DD
to Reset Delay (µsec)
120
110
100
90
80
70
60
50
40
30
1
10
100
1000
TCM8XXZ/R/S/T
(SC-70)
TCM8XXL/M/J
(SC-70)
FIGURE 4-2:
The addition of R
1
at the
RESET output of the TCM809 ensures that the
RESET output is valid to
V
DD
= 0V.
Reset Comparator Overdrive (mV)
[V
TH
– V
DD
] (mv)
FIGURE 4-1:
Maximum Transient
Duration vs. Overdrive for Glitch Rejection at
+25°C.
©
2005 Microchip Technology Inc.
DS21661D-page 5
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