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LTC2240CUP-12#PBF

Description
IC ADC 12BIT 170MSPS 64-QFN
CategoryAnalog mixed-signal IC    converter   
File Size546KB,30 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance
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LTC2240CUP-12#PBF Overview

IC ADC 12BIT 170MSPS 64-QFN

LTC2240CUP-12#PBF Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?conform to
MakerLinear ( ADI )
Parts packaging codeQFN
package instructionHVQCCN, LCC64,.35SQ,20
Contacts64
Manufacturer packaging codeUP
Reach Compliance Codecompliant
ECCN code3A991.C.2
Samacsys DescriptionIC ADC 12BIT 170MSPS 64-QFN
Maximum analog input voltage1 V
Minimum analog input voltage-1 V
Converter typeADC, PROPRIETARY METHOD
JESD-30 codeS-PQCC-N64
JESD-609 codee3
length9 mm
Maximum linear error (EL)0.0513%
Humidity sensitivity level1
Number of analog input channels1
Number of digits12
Number of functions1
Number of terminals64
Maximum operating temperature70 °C
Minimum operating temperature
Output bit codeOFFSET BINARY, 2\'S COMPLEMENT BINARY
Output formatPARALLEL, WORD
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC64,.35SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply2.5 V
Certification statusNot Qualified
Sampling rate170 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height0.8 mm
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width9 mm
LTC2240-12
12-Bit, 170Msps ADC
FEATURES
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DESCRIPTION
The LTC
®
2240-12 is a 170Msps, sampling 12-bit A/D con-
verter designed for digitizing high frequency, wide dynamic
range signals. The LTC2240-12 is perfect for demanding
communications applications with AC performance that
includes 65.6dB SNR and 80dB SFDR. Ultralow jitter of
95fs
RMS
allows IF undersampling with excellent noise
performance.
DC specs include ±0.6LSB INL (typ), ±0.4LSB DNL (typ)
and no missing codes over temperature.
The digital outputs can be either differential LVDS, or
single-ended CMOS. There are three format options for
the CMOS outputs: a single bus running at the full data
rate or two demultiplexed buses running at half data rate
with either interleaved or simultaneous update. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 2.625V.
The ENC
+
and ENC
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL, or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance over a wide range of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
*LTC2220-1, LTC2220, LTC2221, LTC2230, LTC2231 are 3.3V parts.
n
Sample Rate: 170Msps
65.6dB SNR
80dB SFDR
1.2GHz Full Power Bandwidth S/H
Single 2.5V Supply
Low Power Dissipation: 445mW
LVDS, CMOS, or Demultiplexed CMOS Outputs
Selectable Input Ranges: ±0.5V or ±1V
No Missing Codes
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Data Ready Output Clock
Pin Compatible Family
250Msps: LTC2242-12 (12-Bit), LTC2242-10 (10-Bit)
210Msps: LTC2241-12 (12-Bit), LTC2241-10 (10-Bit)
170Msps: LTC2240-12 (12-Bit), LTC2240-10 (10-Bit)
185Msps: LTC2220-1 (12-Bit)*
170Msps: LTC2220 (12-Bit), LTC2230 (10-Bit)*
135Msps: LTC2221 (12-Bit), LTC2231 (10-Bit)*
64-Pin 9mm
×
9mm QFN Package
APPLICATIONS
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Wireless and Wired Broadband Communication
Cable Head-End Systems
Power Amplifier Linearization
Communications Test Equipment
TYPICAL APPLICATION
2.5V
V
DD
REFH
REFL
FLEXIBLE
REFERENCE
0.5V
TO 2.625V
OV
DD
D11
D0
85
80
75
12-BIT
PIPELINED
ADC CORE
CMOS
OR
LVDS
SFDR (dBFS)
SFDR vs Input Frequency
+
ANALOG
INPUT
INPUT
S/H
70
65
1V RANGE
60
2V RANGE
55
50
45
40
0 100 200 300 400 500 600 700 800 900 1000
INPUT FREQUENCY (MHz)
224012 G11
CORRECTION
LOGIC
OUTPUT
DRIVERS
OGND
CLOCK/DUTY
CYCLE
CONTROL
224012 TA01
ENCODE
INPUT
224012fd
1

LTC2240CUP-12#PBF Related Products

LTC2240CUP-12#PBF LTC2240IUP-12#PBF LTC2240IUP-12#TRPBF LTC2240CUP-12#TRPBF
Description IC ADC 12BIT 170MSPS 64-QFN IC ADC 12BIT 170MSPS 64-QFN IC ADC 12BIT 170MSPS 64-QFN IC ADC 12BIT 170MSPS 64-QFN
Brand Name Linear Technology Linear Technology Linear Technology Linear Technology
Is it Rohs certified? conform to conform to conform to conform to
Maker Linear ( ADI ) Linear ( ADI ) Linear ( ADI ) Linear ( ADI )
Parts packaging code QFN QFN QFN QFN
package instruction HVQCCN, LCC64,.35SQ,20 HVQCCN, LCC64,.35SQ,20 HVQCCN, LCC64,.35SQ,20 HVQCCN, LCC64,.35SQ,20
Contacts 64 64 64 64
Manufacturer packaging code UP UP UP UP
Reach Compliance Code compliant compliant compliant compliant
ECCN code 3A991.C.2 3A991.C.2 3A991.C.2 3A991.C.2
Maximum analog input voltage 1 V 1 V 1 V 1 V
Minimum analog input voltage -1 V -1 V -1 V -1 V
Converter type ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD
JESD-30 code S-PQCC-N64 S-PQCC-N64 S-PQCC-N64 S-PQCC-N64
JESD-609 code e3 e3 e3 e3
length 9 mm 9 mm 9 mm 9 mm
Maximum linear error (EL) 0.0513% 0.0513% 0.0513% 0.0513%
Humidity sensitivity level 1 1 1 1
Number of analog input channels 1 1 1 1
Number of digits 12 12 12 12
Number of functions 1 1 1 1
Number of terminals 64 64 64 64
Maximum operating temperature 70 °C 85 °C 85 °C 70 °C
Output bit code OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY
Output format PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVQCCN HVQCCN HVQCCN HVQCCN
Encapsulate equivalent code LCC64,.35SQ,20 LCC64,.35SQ,20 LCC64,.35SQ,20 LCC64,.35SQ,20
Package shape SQUARE SQUARE SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260 260
power supply 2.5 V 2.5 V 2.5 V 2.5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Sampling rate 170 MHz 170 MHz 170 MHz 170 MHz
Sample and hold/Track and hold SAMPLE SAMPLE SAMPLE SAMPLE
Maximum seat height 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Nominal supply voltage 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 30 30 30
width 9 mm 9 mm 9 mm 9 mm

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