TC1303B
500 mA Synchronous Buck Regulator,
+ 300 mA LDO with Power-Good Output
Features
• Dual-Output Regulator (500 mA Buck Regulator
and 300 mA Low-Dropout Regulator)
• Power-Good Output with 300 ms Delay
• Total Device Quiescent Current = 65 µA, Typ.
• Independent Shutdown for Buck and LDO
Outputs
• Both Outputs Internally Compensated
• Synchronous Buck Regulator:
- Over 90% Typical Efficiency
- 2.0 MHz Fixed Frequency PWM
(Heavy Load)
- Low Output Noise
- Automatic PWM to PFM mode transition
- Adjustable (0.8V to 4.5V) and Standard Fixed
Output Voltages (0.8V, 1.2V, 1.5V, 1.8V, 2.5V,
3.3V)
• Low-Dropout Regulator:
- Low-Dropout Voltage = 137 mV Typ. @
200 mA
- Standard Fixed Output Voltages
(1.5V, 1.8V, 2.5V, 3.3V)
• Power-Good Function:
- Monitors LDO Output Function (TC1303B)
- 300 ms Delay Used for Processor Reset
• Small 10-pin 3X3 DFN or MSOP Package
Options
• Operating Junction Temperature Range:
- -40°C to +125°C
• Undervoltage Lockout (UVLO)
• Output Short Circuit Protection
• Overtemperature Protection
Description
The TC1303B combines a 500 mA synchronous buck
regulator and 300 mA Low-Dropout Regulator (LDO)
with a power-good monitor to provide a highly
integrated solution for devices that require multiple
supply voltages. The unique combination of an
integrated buck switching regulator and low-dropout
linear regulator provides the lowest system cost for
dual-output voltage applications that require one lower
processor core voltage and one higher bias voltage.
The 500 mA synchronous buck regulator switches at a
fixed frequency of 2.0 MHz when the load is heavy
providing a low noise, small-size solution. When the
load on the buck output is reduced to light levels, it
changes operation to a Pulse Frequency Modulation
(PFM) mode to minimize quiescent current draw from
the battery. No intervention is necessary for smooth
transition from one mode to another.
The LDO provides a 300 mA auxiliary output that
requires a single 1 µF ceramic output capacitor,
minimizing board area and cost. The typical dropout
voltage for the LDO output is 137 mV for a 200 mA
load.
For the TC1303B, the power-good output logic level is
based on the regulation of the LDO output only. The
buck regulator can be turned on and off without affecting
the power-good signal.
The TC1303B is available in either the 10-pin DFN or
MSOP package.
Additional protection features include: UVLO,
overtemperature and overcurrent protection on both
outputs.
For a complete listing of TC1303B standard parts, con-
sult your Microchip representative.
Applications
•
•
•
•
•
Cellular Phones
Portable Computers
USB Powered Devices
Handheld Medical Instruments
Organizers and PDAs
Package Type
10-Lead DFN
SHDN2 1
V
IN2
2
V
OUT2
3
PG 4
A
GND
5
10 P
GND
9 L
X
8 V
IN1
7 SHDN1
6 V
FB1
/V
OUT1
10-Lead MSOP
SHDN2 1
V
IN2
2
V
OUT2
3
PG 4
A
GND
5
10 P
GND
9 L
X
8 V
IN1
7 SHDN1
6 V
FB1
/V
OUT1
©
2005 Microchip Technology Inc.
DS21949A-page 1
TC1303B
Functional Block Diagram
V
REF
Undervoltage Lockout
(UVLO)
UVLO
Synchronous BUCK Regulator
V
IN1
V
IN2
PDRV
L
X
SHDN1
Control
Driver
NDRV
P
GND
P
GND
V
OUT1
/V
FB1
P
GND
A
GND
PG
TC1303B
PG Generator with Delay
V
REF
UVLO
V
OUT2
LDO
SHDN2
A
GND
DS21949A-page 2
©
2005 Microchip Technology Inc.
TC1303B
Typical Application Circuits
TC1303B
Fixed Output Application
10-Lead MSOP
4.7µH
V
IN
2.7V to 4.2V
4.7 µF
8
2
7
1
4
Processor
RESET
V
IN1
V
IN2
SHDN1
SHDN2
PG
L
X
9
4.7 µF
P
GND
10
V
OUT1
V
OUT2
A
GND
6
3
5
1 µF
V
OUT2
2.5V @ 300 mA
V
OUT1
1.5V @ 500 mA
TC1303B
Adjustable Output Application
10-Lead DFN
Input
Voltage
4.5V to 5.5V
*Optional
Capacitor
V
IN2
1.0 µF
4.7 µH
8
4.7 µF
2
7
1
4
Processor
RESET
V
IN1
V
IN2
SHDN1
SHDN2
PG
L
X
9
4.7 µF
200 k
Ω
V
OUT2
1 µF
3.3V @
300 mA
4.99 k
Ω
33 pF
121 k
Ω
P
GND
10
V
OUT1
6
V
OUT2
A
GND
3
5
Note
V
OUT1
2.1V @
500 mA
Note:
Connect DFN package exposed pad to A
GND
.
©
2005 Microchip Technology Inc.
DS21949A-page 3
TC1303B
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings †
V
IN
- A
GND
......................................................................6.0V
All Other I/O .............................. (A
GND
- 0.3V) to (V
IN
+ 0.3V)
L
X
to P
GND
.............................................. -0.3V to (V
IN
+ 0.3V)
P
GND
to A
GND
................................................... -0.3V to +0.3V
Output Short Circuit Current ................................. Continuous
Power Dissipation (Note
7)
..........................Internally Limited
Storage temperature .....................................-65°C to +150°C
Ambient Temp. with Power Applied.................-40°C to +85°C
Operating Junction Temperature...................-40°C to +125°C
ESD protection on all pins (HBM)
.......................................
3 kV
DC CHARACTERISTICS
Electrical Characteristics:
V
IN1
=V
IN2
= SHDN1,2 = 3.6V, C
OUT1
= C
IN
= 4.7 µF, C
OUT2
= 1µF, L = 4.7 µH, V
OUT1
(ADJ) = 1.8V,
I
OUT1
= 100 ma, I
OUT2
= 0.1 mA T
A
= +25°C.
Boldface
specifications apply over the T
A
range of
-40°C to +85°C.
Parameters
Input/Output Characteristics
Input Voltage
Maximum Output Current
Maximum Output Current
Shutdown Current
Combined V
IN1
and V
IN2
Current
TC1303B Operating I
Q
Synchronous Buck I
Q
LDO I
Q
+ Voltage Monitor I
Q
SHDN1,SHDN2,
Logic Input Voltage Low
SHDN1,SHDN2,
Logic Input Voltage High
SHDN1,SHDN2,
Input Leakage Current
Thermal Shutdown
Thermal Shutdown Hysteresis
Undervoltage Lockout
(V
OUT1
and V
OUT2
)
Undervoltage Lockout Hysteresis
Note 1:
2:
3:
4:
5:
6:
V
IL
V
IH
I
IN
V
IN
I
OUT1_MAX
I
OUT2_MAX
I
IN_SHDN
I
Q
2.7
500
300
—
—
—
—
—
45
-1.0
—
—
—
0.05
65.0
38
46
—
—
±0.01
5.5
—
—
1
110
—
—
15
—
1.0
V
mA
mA
µA
µA
µA
µA
%V
IN
%V
IN
µA
Note 1, Note 2, Note 8
Note 1
Note 1
SHDN1 = SHDN2 = GND
SHDN1 = SHDN2 = V
IN2
I
OUT1
= 0 mA, I
OUT2
= 0 mA
SHDN1 = V
IN
, SHDN2 = GND
SHDN1 = GND, SHDN2 = V
IN2
V
IN1
=V
IN2
= 2.7V to 5.5V
V
IN1
=V
IN2
= 2.7V to 5.5V
V
IN1
=V
IN2
= 2.7V to 5.5V
SHDNX = GND
SHDNY = V
IN
Note 6, Note 7
V
IN1
Falling
Sym
Min
Typ
Max
Units
Conditions
Shutdown/UVLO/Thermal Shutdown Characteristics
T
SHD
T
SHD-HYS
UVLO
UVLO
-
HYS
—
—
2.4
—
165
10
2.55
200
—
—
2.7
—
°C
°C
V
mV
7:
8:
The Minimum V
IN
has to meet two conditions: V
IN
≥
2.7V and V
IN
≥
V
RX
+ V
DROPOUT,
V
RX
= V
R1
or V
R2
.
V
RX
is the regulator output voltage setting.
TCV
OUT2
= ((V
OUT2max
– V
OUT2min
) * 10
6
)/(V
OUT2
* D
T
).
Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current.
Dropout voltage is defined as the input to output voltage differential at which the output voltage drops 2% below its
nominal value measured at a 1V differential.
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e. T
A
, T
J
,
θ
JA
). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown.
The integrated MOSFET switches have an integral diode from the L
X
pin to V
IN
, and from L
X
to P
GND
. In cases where
these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not
able to limit the junction temperature for these cases.
V
IN1
and V
IN2
are supplied by the same input source.
DS21949A-page 4
©
2005 Microchip Technology Inc.
TC1303B
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics:
V
IN1
=V
IN2
= SHDN1,2 = 3.6V, C
OUT1
= C
IN
= 4.7 µF, C
OUT2
= 1µF, L = 4.7 µH, V
OUT1
(ADJ) = 1.8V,
I
OUT1
= 100 ma, I
OUT2
= 0.1 mA T
A
= +25°C.
Boldface
specifications apply over the T
A
range of
-40°C to +85°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Synchronous Buck Regulator (V
OUT1
)
Adjustable Output Voltage Range
Adjustable Reference Feedback
Voltage (V
FB1
)
Feedback Input Bias Current
(I
FB1
)
Output Voltage Tolerance Fixed
(V
OUT1
)
Line Regulation (V
OUT1
)
Load Regulation (V
OUT1
)
Dropout Voltage V
OUT1
Internal Oscillator Frequency
Start Up Time
R
DSon
P-CHANNEL
R
DSon
N-CHANNEL
L
X
Pin Leakage Current
Positive Current Limit Threshold
LDO Output (V
OUT2
)
Output Voltage Tolerance (V
OUT2
)
Temperature Coefficient
Line Regulation
Load Regulation, V
OUT2
≥
2.5V
Load Regulation, V
OUT2
< 2.5V
Dropout Voltage V
OUT2
> 2.5V
Power Supply Rejection Ratio
Output Noise
Output Short Circuit Current
(Average)
Note 1:
2:
3:
4:
5:
6:
V
OUT2
TCV
OUT
ΔV
OUT2
/
ΔV
IN
ΔV
OUT2
/
I
OUT2
ΔV
OUT2
/
I
OUT2
V
IN
– V
OUT2
PSRR
eN
I
OUTsc2
-2.5
—
-0.2
-0.75
-0.90
—
—
—
—
±0.3
25
±0.02
0.1
0.1
137
205
62
1.8
240
+2.5
—
+0.2
+0.75
+0.90
300
500
—
—
—
%
ppm/°C
%/V
%
%
mV
dB
µV/(Hz)
½
mA
Note 2
Note 3
(V
R
+1V)
≤
V
IN
≤
5.5V
I
OUT2
= 0.1 mA to 300 mA (Note
4)
I
OUT2
= 0.1 mA to 300 mA (Note
4)
I
OUT2
= 200 mA (Note
5)
I
OUT2
= 300 mA
f
≤
100 Hz, I
OUT1
= I
OUT2
= 50 mA,
C
IN
= 0 µF
f
≤
1 kHz, I
OUT2
= 50 mA,
SHDN1 = GND
R
LOAD2
≤
1Ω
V
OUT1
V
FB1
I
VFB1
V
OUT1
V
LINE-REG
V
LOAD-REG
V
IN
– V
OUT1
F
OSC
T
SS
R
DSon-P
R
DSon-N
I
LX
+I
LX(MAX)
0.8
0.78
—
-2.5
—
—
—
1.6
—
—
—
-1.0
—
—
0.8
-1.5
±0.3
0.2
0.2
280
2.0
0.5
450
450
±0.01
700
4.5
0.82
—
+2.5
—
—
—
2.4
—
650
650
1.0
—
V
V
nA
%
%/V
%
mV
MHz
ms
mΩ
mΩ
μA
mA
T
R
= 10% to 90%
I
P
=100 mA
I
N
=100 mA
SHDN = 0V, V
IN
= 5.5V, L
X
= 0V,
L
X
= 5.5V
Note 2
V
IN
=V
R
+1V to 5.5V,
I
LOAD
= 100 mA
V
IN
= V
R
+ 1.5V, I
LOAD
= 100 mA to
500 mA (Note
1)
I
OUT1
= 500 mA, V
OUT1
= 3.3V
(Note
5)
7:
8:
The Minimum V
IN
has to meet two conditions: V
IN
≥
2.7V and V
IN
≥
V
RX
+ V
DROPOUT,
V
RX
= V
R1
or V
R2
.
V
RX
is the regulator output voltage setting.
TCV
OUT2
= ((V
OUT2max
– V
OUT2min
) * 10
6
)/(V
OUT2
* D
T
).
Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current.
Dropout voltage is defined as the input to output voltage differential at which the output voltage drops 2% below its
nominal value measured at a 1V differential.
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e. T
A
, T
J
,
θ
JA
). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown.
The integrated MOSFET switches have an integral diode from the L
X
pin to V
IN
, and from L
X
to P
GND
. In cases where
these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not
able to limit the junction temperature for these cases.
V
IN1
and V
IN2
are supplied by the same input source.
©
2005 Microchip Technology Inc.
DS21949A-page 5
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