EEWORLDEEWORLDEEWORLD

Part Number

Search

598BCA001137DGR

Description
OSC XO 156.2500MHZ LVDS SMD
CategoryPassive components   
File Size550KB,27 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric View All

598BCA001137DGR Online Shopping

Suppliers Part Number Price MOQ In stock  
598BCA001137DGR - - View Buy Now

598BCA001137DGR Overview

OSC XO 156.2500MHZ LVDS SMD

598BCA001137DGR Parametric

Parameter NameAttribute value
typeXO (Standard)
frequency156.25MHz
Functionenable/disable (programmable)
outputLVDS
Voltage - Power2.97 V ~ 3.63 V
frequency stability±20ppm
Absolute pulling range (APR)-
Operating temperature-40°C ~ 85°C
Current - Power (maximum)110mA
grade-
Installation typesurface mount
Package/casing8-SMD, no leads
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
Si 5 9 8 / S i 5 9 9
10–810 M H
Z
I
2
C P
ROGRAMMABLE
XO/VCXO
Features
I
2
C programmable output
frequencies from 10 to 810 MHz
0.5 ps RMS phase jitter
Superior power supply rejection:
0.3–0.4 ps additive jitter
Available LVPECL, CMOS, LVDS,
and CML outputs
1.8, 2.5, or 3.3 V supply
Pin- and register-compatible with
Si570/571
Programmable with 28 parts per
trillion frequency resolution
Integrated crystal provides stability
and low phase noise
Frequency changes up to
±3500 ppm are glitchless
–40 to 85 °C operation
Industry-standard 5x7 mm package
Si5602
Applications
Ordering Information:
SONET / SDH / xDSL
Ethernet / Fibre Channel
3G SDI / HD SDI
Multi-rate PLLs
Multi-rate reference clocks
Frequency margining
Digital PLLs
CPU / FPGA FIFO control
Adaptive synchronization
Agile RF local oscillators
See page 21.
Pin Assignments:
See page 20.
(Top View)
SDA
7
NC
1
2
3
8
SCL
6
5
4
V
DD
Description
The Si598 XO/Si599 VCXO utilizes Silicon Laboratories' advanced DSPLL®
circuitry to provide a low-jitter clock at any frequency. They are user-
programmable to any output frequency from 10 to 810 MHz with 28 parts per
trillion (PPT) resolution. The device is programmed via a 2-pin I
2
C compatible
serial interface. The wide frequency range and ultra-fine programming resolution
make these devices ideal for applications that require in-circuit dynamic frequency
adjustments or multi-rate operation with non-integer related rates. Using an
integrated crystal, these devices provide stable low jitter frequency synthesis and
replace multiple XOs, clock generators, and DAC controlled VCXOs.
OE
GND
CLK–
CLK+
Functional Block Diagram
V
DD
OE
Power Supply Filtering
Si598
SDA
Fixed
Frequency
Oscillator
Any Frequency
DSPLL®
10 to 810 MHz
Clock Synthesis
CLK+
CLK–
7
V
C
1
2
3
8
SCL
6
5
4
V
DD
Vc
(Si599)
OE
CLK–
CLK+
ADC
I2C Interface
GND
SDA
SCL
GND
Si599
Rev. 1.1 6/18
Copyright © 2018 by Silicon Laboratories
Si598/Si599
【LPC54100】Basic principles of self-balancing car----all codes are open source...
[i=s]This post was last edited by youki12345 on 2015-5-24 15:11[/i] The design is finally finished. Now it's time to analyze the basic principles of the car. First, here are some beautiful photos.I go...
youki12345 NXP MCU
Today at 10:00 am, Keysight Technologies' award-winning live broadcast begins | Evolution and updates of signal integrity testing
A wave of signal integrity solutions is coming, engineers, take it! Live broadcast time: 10:00-11:30 am, April 30, 2021 (Friday) Live Topic: Evolution and Update of Signal Integrity TestingClick to wa...
EEWORLD社区 Test/Measurement
[Micropython]TPYBoard v202 v102+v202 home wireless temperature and humidity detection
[color=#333333][backcolor=transparent][font=微软雅黑][size=18px][size=4][backcolor=transparent][b] 1. Experimental devices[/b][/backcolor][/size][indent][backcolor=transparent][list] [*]1. TPYBoard v102 1...
loktar MicroPython Open Source section
Smart Home System Case - Bill Gates' "Home of the Future"
The most famous smart home nowadays is Bill Gates's mansion. In his book "The Road Ahead", he devoted a lot of space to describing the private mansion he was building on Lake Washington. In his descri...
xyh_521 Industrial Control Electronics
What’s going on???
Today I wrote a small program, which includes buttons and digital tubes. Everything was normal at first, but when I downloaded it with AS for the second time, I found that the digital tubes were off. ...
zhangkai0215 FPGA/CPLD
Proteus simulation implementation of simple single-chip calculator
A simple addition, subtraction, multiplication and division calculator /*Note that the header file "bsp_GOG1.h" above contains an optional macro definition.If you need to use the expansion board, plea...
灞波儿奔 Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 930  1342  1698  2559  213  19  28  35  52  5 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号