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FDD9409L-F085

Description
NMOS DPAK 40V 2.6 MOHM
CategoryDiscrete semiconductor    The transistor   
File Size463KB,6 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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FDD9409L-F085 Overview

NMOS DPAK 40V 2.6 MOHM

FDD9409L-F085 Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
package instructionSMALL OUTLINE, R-PSSO-G2
Manufacturer packaging code369AS
Reach Compliance Codenot_compliant
Factory Lead Time16 weeks
Samacsys DescriptionMOSFET N-channel Power Trench MOSFET
Avalanche Energy Efficiency Rating (Eas)33.7 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage40 V
Maximum drain current (Abs) (ID)90 A
Maximum drain current (ID)90 A
Maximum drain-source on-resistance0.0044 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-252
JESD-30 codeR-PSSO-G2
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature175 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)150 W
GuidelineAEC-Q101
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Maximum off time (toff)70 ns
Maximum opening time (tons)47 ns
Base Number Matches1
FDD9409L-F085 N-Channel Logic Level PowerTrench® MOSFET
FDD9409L-F085
N-Channel Logic Level PowerTrench
®
MOSFET
40 V, 90 A, 2.6 mΩ
Features
Typical R
DS(on)
= 2.1 m at V
GS
= 10V, I
D
= 80 A
Typical Q
g(tot)
= 52 nC at V
GS
= 10V, I
D
= 80 A
UIS Capability
RoHS Compliant
Qualified to AEC Q101
D
G
S
D
G
Applications
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
Electronic Steering
Integrated Starter/Alternator
Distributed Power Architectures and VRM
Primary Switch for 12V Systems
D-PAK
TO-252
(TO-252)
S
MOSFET Maximum Ratings
T
J
= 25°C unless otherwise noted.
Symbol
V
DSS
Drain-to-Source Voltage
V
GS
I
D
E
AS
P
D
R
JC
R
JA
Gate-to-Source Voltage
Drain Current - Continuous (V
GS
=10) (Note 1)
Pulsed Drain Current
Single Pulse Avalanche Energy
Power Dissipation
Derate Above 25
o
C
Parameter
Ratings
40
±20
T
C
= 25°C
T
C
= 25°C
(Note 2)
90
See Figure 4
33.7
150
1
-55 to + 175
1
(Note 3)
52
Units
V
V
A
mJ
W
W/
o
C
o
C
o
T
J
, T
STG
Operating and Storage Temperature
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
C/W
o
C/W
Notes:
1: Current is limited by bondwire configuration.
2: Starting T
J
= 25°C, L = 15uH, I
AS
= 67A, V
DD
= 40V during inductor charging and V
DD
= 0V during time in avalanche.
3: R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
JC
is guaranteed by design, while R
JA
is determined by the board design. The maximum rating
presented here is based on mounting on a 1 in
2
pad of 2oz copper.
Package Marking and Ordering Information
Device Marking
FDD9409L
Device
FDD9409L-F085
Package
D-PAK(TO-252)
Reel Size
13”
Tape Width
16mm
Quantity
2500units
©2016
Semiconductor Components Industries, LLC.
August-2017,
Rev.
2
Publication Order Number:
FDD9409L-F085/D
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