SI4136-F-GT datasheet, PDF - EEWORLD Datasheet

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SI4136-F-GT: DescriptionIC WLAN SAT RADIO 24TSSOP; CategoryWireless rf/communication Telecom circuit; File Size1MB，34 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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SI4136-F-GT Overview

IC WLAN SAT RADIO 24TSSOP

SI4136-F-GT Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP24,.25
Contacts	24
Reach Compliance Code	compliant
JESD-30 code	R-PDSO-G24
JESD-609 code	e3
length	7.8 mm
Humidity sensitivity level	3
Number of functions	1
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP24,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/3.3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum slew rate	0.031 mA
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	RF AND BASEBAND CIRCUIT
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm

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Si4136/Si4126

ISM RF S

YNTHESIZER

ITH

NTEGRATED

VCO

O R

I R E L E S S

O M M U N IC A TI O N S

Features



Dual-band RF synthesizers



RF1:



2300 MHz to 2500 MHz



RF2: 2025 MHz to 2300 MHz



IF synthesizer



62.5

MHz to 1000 MHz

Integrated VCOs, loop filters,

varactors, and resonators

Minimal external components

required

Low phase noise

5 µA standby current

25.7 mA typical supply current

2.7 V to 3.6 V operation

Packages: 24-pin TSSOP,

28-lead QFN



Lead-free/RoHS-compliant options

Ordering Information:

See page 29.

available

Pin Assignments

Applications



Si4136-GT



ISM and MMDS band

communications

Wireless LAN and WAN

Dual-band communications

SCLK

SDATA

GND

RFOUT

SEN

VDDI

IFOUT

GND

IFLB

IFLA

GND

VDDD

GND

XIN

PWDN

AUXOUT

Description

The Si4136 is a monolithic integrated circuit that performs both IF and RF

synthesis for wireless communications applications. The Si4136 includes

three VCOs, loop filters, reference and VCO dividers, and phase detectors.

Divider and powerdown settings are programmable through a three-wire

serial interface.

Functional Block Diagram

Reference

Amplifier

Power

Down

Control

XIN

÷1/÷2



RF1

Phase

Detect

RF1

VDDR

PWDN



RF1



RF2

Phase

Detect



RFOUT

Si4136-GM

SDATA

IFOUT

SCLK

VDDI

GND

SEN

GND

SDATA

SCLK

SEN

Serial

Interface

22-bit

Data

RF2

28 27 26 25 24 23 22

GND



RF2



Phase

Detect



IFDIV

IFOUT

IFLA

IFLB

GND

IFLB

IFLA

GND

VDDD

GND

XIN

AUXOUT

Test

Mux

GND



GND

10 11 12 13 14

AUXOUT

RFOUT

PWDN

VDDR

GND

Patents pending

Rev. 1.42

Si4136/Si4126

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).

Si4136/Si4126

ABLE

Section

ONTENTS

Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.1. Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.2. Setting the IF VCO Center Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.3. Self-Tuning Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.4. Output Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.5. PLL Loop Dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.6. RF and IF Outputs (RFOUT and IFOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.7. Reference Frequency Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.8. Powerdown Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.9. Auxiliary Output (AUXOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3. Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

4. Pin Descriptions: Si4136-GT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5. Pin Descriptions: Si4136-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

7. Si4136 Derivative Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

8. Package Outline: Si4136-GT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

9. Package Outline: Si4136-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

Rev. 1.42

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