Data Sheet
FEATURES
SPI Interface, Low C
ON
and Q
INJ
, ±15 V/+12 V,
1.8 V Logic Control, 8:1/Dual 4:1 Mux Switches
ADGS1208/ADGS1209
FUNCTIONAL BLOCK DIAGRAMS
ADGS1208
S1
SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count
error detection
Supports burst mode and daisy-chain mode
Industry standard SPI Mode 0 and SPI Mode 3 interface
compatible
Round robin mode allows switching times that are
comparable with a parallel interface
Four general-purpose digital outputs that can be used to
control other devices
<1 pC charge injection over full signal range
1 pF off capacitance
V
SS
to V
DD
analog signal range
Fully specified at ±15 V and +12 V
1.8 V logic compatibility with 2.7 V ≤ V
L
≤ 3.3 V
24-lead LFCSP package
D
S8
GPO1
GPO2
GPO3
GPO4
SCLK
SPI
INTERFACE
CNV
SDO
16724-001
SDI
CS RESET/V
L
Figure 1. ADGS1208 Functional Block Diagram
ADGS1209
S1A
DA
S4A
APPLICATIONS
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
S1B
DB
S4B
GPO1
GPO2
GPO3
GPO4
SCLK
SPI
INTERFACE
CNV
SDO
16724-002
GENERAL DESCRIPTION
The ADGS1208/ADGS1209 are analog multiplexers comprising
eight single channels and four differential channels, respectively. A
serial peripheral interface (SPI) controls the switches. The SPI
interface has robust error detection features, such as cyclic
redundancy check (CRC) error detection, invalid read/write
address detection, and SCLK count error detection.
It is possible to daisy-chain multiple ADGS1208/ADGS1209
devices together. Daisy-chain mode enables the configuration of
multiple devices with a minimal amount of digital lines. The
ADGS1208/ADGS1209 can also operate in burst mode to
decrease the time between SPI commands.
iCMOS® construction ensures ultralow power dissipation,
making the devices ideally suited for portable and battery-
powered instruments.
Each switch conducts equally well in both directions when on,
and each switch has an input signal range that extends to the
supplies. In the off condition, signal levels up to the supplies
are blocked.
SDI
CS RESET/V
L
Figure 2. ADGS1209 Functional Block Diagram
The ultralow on capacitance (C
ON
) and exceptionally low charge
injection (Q
INJ
) of these multiplexers make them ideal solutions
for data acquisition and sample-and-hold applications, where
low glitch and fast settling are required.
PRODUCT HIGHLIGHTS
1.
2.
3.
SPI interface removes the need for parallel conversion,
logic traces, and reduces GPIO channel count.
Daisy-chain mode removes additional logic traces when
multiple devices are used.
CRC error detection, invalid read/write address detection,
and SCLK count error detection ensure a robust digital
interface.
CRC and error detection capabilities allow the use of the
ADGS1208/ADGS1209 in safety critical systems.
4.
Rev. 0
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Trademarks and registered trademarks are the property of their respective owners.
ADGS1208/ADGS1209
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
12 V Single Supply ........................................................................ 5
Continuous Current per Channel, Sx or Dx ............................. 8
Timing Characteristics ................................................................ 9
Absolute Maximum Ratings .......................................................... 11
Thermal Resistance .................................................................... 11
ESD Caution ................................................................................ 11
Pin Configurations and Function Descriptions ......................... 12
Typical Performance Characteristics ........................................... 14
Test Circuits ..................................................................................... 18
Terminology .................................................................................... 21
Theory of Operation ...................................................................... 22
Address Mode ............................................................................. 22
Error Detection Features ........................................................... 22
Clearing the Error Flags Register ............................................. 23
Burst Mode .................................................................................. 23
Data Sheet
Software Reset ............................................................................. 23
Daisy-Chain Mode ..................................................................... 23
Power-On Reset .......................................................................... 24
Round Robin Mode.................................................................... 25
General-Purpose Outputs ......................................................... 26
Applications Information .............................................................. 27
Digital Input Buffers .................................................................. 27
Settling Time ............................................................................... 27
Power Supply Rails ..................................................................... 27
Power Supply Recommendations............................................. 27
Register Summaries ........................................................................ 28
Register Details ............................................................................... 29
Switch Data Register .................................................................. 29
Error Configuration Register.................................................... 30
Error Flags Register .................................................................... 30
Burst Enable Register ................................................................. 31
Round Robin Enable Register................................................... 31
Round Robin Channel Configuration Register...................... 31
CNV Edge Select Register ......................................................... 32
Software Reset Register ............................................................. 32
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 33
REVISION HISTORY
4/2018—Revision 0: Initial Version
Rev. 0 | Page 2 of 33
Data Sheet
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= 15 V ± 10%, V
SS
= −15 V ± 10%, V
L
= 2.7 V to 5.5 V, and GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
+25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
150
200
3.5
6
35
64
±0.003
±0.1
±0.003
±0.1
±0.02
±0.3
±0.6
±1.0
240
270
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
ADGS1208/ADGS1209
Test Conditions/Comments
On Resistance Match Between
Channels, ∆R
ON
On Resistance Flatness, R
FLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
V
S
= ±10 V, I
S
= −1 mA,
see Figure 39
V
DD
= +13.5 V, V
SS
= −13.5 V
V
S
= ±10 V, I
S
= −1 mA
10
76
12
83
V
S
= ±10 V, I
S
= −1 mA
V
DD
= +16.5 V, V
SS
= −16.5 V
V
S
= ±10 V, V
D
=
10 V,
see Figure 36
V
S
= ±10 V, V
D
=
10 V,
see Figure 36
V
S
= V
D
= ±10 V, see Figure 32
Drain Off Leakage, I
D
(Off )
±0.6
±0.6
±1.0
±1.0
Channel On Leakage, I
D
(On), I
S
(On)
DIGITAL OUTPUTS
SDO
Output Voltage
Low, V
OL
High Impedance Leakage Current
High Impedance Output
Capacitance
GPOx
Output Voltage
High, V
OH
Low, V
OL
Timing
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
0.4
0.2
0.001
±0.1
4
V max
V max
µA typ
µA max
pF typ
Sink current (I
SINK
) = 5 mA
I
SINK
= 1 mA
Output voltage (V
OUT
) = V
GND
or V
L
V
L
− 0.2 V
0.2
95
115
15
20
50
V min
V max
ns typ
ns max
ns typ
ns max
ns typ
ns min
I
SOURCE
= 100 µA
I
SINK
= 100 µA
C
L
= 15 pF, see Figure 44
C
L
= 15 pF, see Figure 44
C
L
= 15 pF, see Figure 45
115
25
115
25
35
Rev. 0 | Page 3 of 33
ADGS1208/ADGS1209
Parameter
DIGITAL INPUTS/OUTPUTS
Input Voltage
High, V
INH
Low, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
D
Charge Injection, Q
INJ
Off Isolation
Channel to Channel Crosstalk
Total Harmonic Distortion Plus
Noise
−3 dB Bandwidth
ADGS1208
ADGS1209
Insertion Loss
C
S
(Off )
C
D
(Off )
ADGS1208
ADGS1209
C
D
(On), C
S
(On)
ADGS1208
ADGS1209
0.001
±0.1
4
90
145
92
110
120
135
32
0.4
−85
−85
0.15
+25°C
−40°C to +85°C
−40°C to +125°C
Unit
Data Sheet
Test Conditions/Comments
2
1.35
0.8
0.8
V min
V min
V max
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
3.3 V < V
L
≤ 5.5 V
2.7 V ≤ V
L
≤ 3.3 V
3.3 V < V
L
≤ 5.5 V
2.7 V ≤ V
L
≤ 3.3 V
Input voltage (V
IN
) = V
GND
or V
L
170
140
170
195
155
190
7
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 41
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 42
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 42
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 10 V, see Figure 40
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF,
see Figure 43
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 34
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 33
R
L
= 110 Ω, 15 V p-p, f = 20 Hz to
20 kHz, see Figure 38
R
L
= 50 Ω, C
L
= 5 pF, see Figure 37
550
630
−6
1
1.6
5
5.5
2
3.5
5
6.5
3
4.5
MHz typ
MHz typ
dB typ
pF typ
pF max
pF typ
pF max
pF typ
pF max
pF typ
pF max
pF typ
pF max
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 37
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
Rev. 0 | Page 4 of 33
Data Sheet
Parameter
POWER REQUIREMENTS
I
DD
+25°C
0.002
1.0
220
380
270
440
I
L
Inactive
Inactive, SCLK = 1 MHz
6.3
8.0
14
7
SCLK = 50 MHz
390
210
Inactive, SDI = 1 MHz
SDI = 25 MHz
Active at 50 MHz
15
7.5
230
120
1.8
2.1
0.7
1.0
I
SS
V
DD
/V
SS
0.002
1.0
±4.5
±16.5
μA typ
μA max
μA typ
μA typ
μA typ
μA typ
μA typ
μA typ
μA typ
μA typ
mA typ
mA max
mA typ
mA max
μA typ
μA max
V min
V max
−40°C to +85°C
−40°C to +125°C
Unit
μA typ
μA max
μA typ
μA max
μA typ
μA max
ADGS1208/ADGS1209
Test Conditions/Comments
V
DD
= +16.5 V, V
SS
= −16.5 V
All switches open
All switches closed, V
L
= 5.5 V
All switches closed, V
L
= 2.7 V
Digital inputs = 0 V or V
L
CS = V
L
and SDI = 0 V or V
L
,
V
L
= 5 V
CS = V
L
and SDI = 0 V or V
L
,
V
L
= 3 V
CS = V
L
and SDI = 0 V or V
L
,
V
L
= 5 V
CS = V
L
and SDI = 0 V or V
L
,
V
L
= 3 V
CS and SCLK = 0 V or V
L
, V
L
= 5 V
CS and SCLK = 0 V or V
L
, V
L
= 3 V
CS and SCLK = 0 V or V
L
, V
L
= 5 V
CS and SCLK = 0 V or V
L
, V
L
= 3 V
Digital inputs toggle between
0 V and V
L
, V
L
= 5.5 V
E
E
E
E
E
E
E
E
Digital inputs toggle between
0 V and V
L
, V
L
= 2.7 V
Digital inputs = 0 V or V
L
GND = 0 V
GND = 0 V
1
Guaranteed by design; not subject to production test.
12 V SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, V
L
= 2.7 V to 5.5 V, and GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
+25°C
−40°C to +85°C
−40°C to +125°C
0 V to V
DD
380
475
5
16
200
570
625
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Test Conditions/Comments
On Resistance Match Between
Channels, ∆R
ON
On Resistance Flatness, R
FLAT (ON)
V
S
= 0 V to 10 V, I
S
= −1 mA,
see Figure 39
V
DD
= 10.8 V, V
SS
= 0 V
V
S
= 0 V to 10 V, I
S
= −1 mA
26
27
V
S
= 0 V to 10 V, I
S
= −1 mA
Rev. 0 | Page 5 of 33
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